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CD74ACT161MG4 PDF预览

CD74ACT161MG4

更新时间： 2024-11-05 15:30:51
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
17页 546K
描述
Binary Counter, ACT Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16

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CD74ACT161MG4 技术参数

生命周期：Contact Manufacturer包装说明：SOP,
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.64其他特性：TCO OUTPUT
计数方向：UP系列：ACT
JESD-30 代码：R-PDSO-G16长度：9.9 mm
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
工作模式：SYNCHRONOUS位数：4
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：16.5 ns座面最大高度：1.75 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL触发器类型：POSITIVE EDGE
宽度：3.9 mm最小 fmax：80 MHz
Base Number Matches：1

CD74ACT161MG4 数据手册

 浏览型号CD74ACT161MG4的Datasheet PDF文件第2页浏览型号CD74ACT161MG4的Datasheet PDF文件第3页浏览型号CD74ACT161MG4的Datasheet PDF文件第4页浏览型号CD74ACT161MG4的Datasheet PDF文件第5页浏览型号CD74ACT161MG4的Datasheet PDF文件第6页浏览型号CD74ACT161MG4的Datasheet PDF文件第7页 
CD54ACT161, CD74ACT161  
4-BIT SYNCHRONOUS BINARY COUNTERS  
SCHS298B – APRIL 2000 – REVISED MARCH 2003  
CD54ACT161 . . . F PACKAGE  
CD74ACT161 . . . E OR M PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Internal Look-Ahead for Fast Counting  
Carry Output for n-Bit Cascading  
Synchronous Counting  
CLR  
CLK  
A
V
CC  
RCO  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Synchronously Programmable  
Q
A
SCR-Latchup-Resistant CMOS Process and  
Circuit Design  
B
Q
B
C
Q
C
Exceeds 2-kV ESD Protection per  
MIL-STD-883, Method 3015  
D
Q
D
ENP  
GND  
ENT  
LOAD  
description/ordering information  
The ’ACT161 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal  
carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having  
all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed  
by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output  
counting spikes that normally are associated with synchronous (ripple-clock) counters. A buffered clock (CLK)  
input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.  
These devices are fully programmable; that is, they can be preset to any number between 0 and 9 or 15.  
Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes  
the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs.  
The clear function is asynchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low,  
regardless of the levels of the CLK, load (LOAD), or enable inputs.  
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without  
additional gating. Instrumental in accomplishing this function are ENP, ENT, and a ripple-carry output (RCO).  
Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a  
high-level pulse while the count is maximum (9 or 15, with Q high). This high-level overflow ripple-carry pulse  
A
can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the  
level of CLK.  
The counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that  
modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of  
the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the  
stable setup and hold times.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – E  
Tube  
Tube  
CD74ACT161E  
CD74ACT161M  
CD74ACT161M96  
CD54ACT161F3A  
CD74ACT161E  
–55°C to 125°C  
SOIC – M  
CDIP – F  
ACT161M  
Tape and reel  
Tube  
CD54ACT161F3A  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...17

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