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CD74ACT14 PDF预览

CD74ACT14

更新时间: 2024-01-04 00:13:40
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
8页 249K
描述
HEX SCHMITT-TRIGGER INVERTER

CD74ACT14 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TSSOP, TSSOP14,.25Reach Compliance Code:not_compliant
风险等级:5.92JESD-30 代码:R-PDSO-G14
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.024 A
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:5 VProp。Delay @ Nom-Sup:13 ns
认证状态:Not Qualified施密特触发器:YES
子类别:Gates标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

CD74ACT14 数据手册

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ꢇꢈꢉ ꢊꢀꢇ ꢋꢌ ꢅꢅꢍꢅ ꢎꢌꢏ ꢏ ꢈꢎ ꢌ ꢐꢑ ꢈ ꢎꢅ ꢈꢎ  
SCHS319A − NOVEMBER 2002 − REVISED NOVEMBER 2004  
D
D
Inputs Are TTL-Voltage Compatible  
E OR M PACKAGE  
(TOP VIEW)  
Speed of Bipolar F, AS, and S, With  
Significantly Reduced Power Consumption  
1A  
1Y  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
D
D
D
D
D
Greater Noise Immunity Than Standard  
Inverters  
6A  
6Y  
5A  
5Y  
4A  
4Y  
2A  
Operates With Much Slower Than Standard  
Input Rise and Fall Slew Rates  
2Y  
3A  
24-mA Output Drive Current  
− Fanout to 15 F Devices  
3Y  
GND  
8
SCR Latchup-Resistant CMOS Process and  
Circuit Design  
Exceeds 2-kV ESD Protection Per  
MIL-STD-883, Method 3015  
description/ordering information  
The CD74ACT14 contains six independent inverters. This device performs the Boolean function Y = A.  
Each circuit functions as an independent inverter, but because of the Schmitt action, the inverters have different  
input threshold levels for positive-going (V ) and negative-going (V ) signals.  
T+  
T−  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − E  
SOIC − M  
Tube  
Tube  
CD74ACT14E  
CD74ACT14M  
CD74ACT14E  
−55°C to 125°C  
ACT14M  
Tape and reel CD74ACT14M96  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
L
H
logic diagram, each inverter (positive logic)  
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢅꢠ  
Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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