5秒后页面跳转
CD74ACT10 PDF预览

CD74ACT10

更新时间: 2024-11-04 23:00:39
品牌 Logo 应用领域
德州仪器 - TI
页数 文件大小 规格书
5页 32K
描述
Triple 3-Input NAND Gate

CD74ACT10 数据手册

 浏览型号CD74ACT10的Datasheet PDF文件第2页浏览型号CD74ACT10的Datasheet PDF文件第3页浏览型号CD74ACT10的Datasheet PDF文件第4页浏览型号CD74ACT10的Datasheet PDF文件第5页 
CD74AC10,  
CD74ACT10  
Data sheet acquired from Harris Semiconductor  
SCHS227  
September 1998  
Triple 3-Input NAND Gate  
Features  
Description  
• Typical Propagation Delay  
o
The CD74AC10 and CD74ACT10 are triple 3-input NAND  
gates that utilize the Harris Advanced CMOS Logic technology.  
- 6ns at V  
= 5V, T = 25 C, C = 50pF  
A L  
CC  
• Exceeds 2kV ESD Protection MIL-STD-883, Method  
3015  
Ordering Information  
PART  
NUMBER  
TEMP.  
PKG.  
NO.  
o
• SCR-Latchup-Resistant CMOS Process and Circuit  
Design  
RANGE ( C)  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
PACKAGE  
14 Ld PDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
CD74AC10E  
CD74ACT10E  
CD74AC10M  
CD74ACT10M  
NOTES:  
E14.3  
• Speed of Bipolar FAST™/AS/S with Significantly  
Reduced Power Consumption  
E14.3  
[ /Title  
(CD74  
AC10,  
CD74  
ACT10  
)
M14.15  
M14.15  
• Balanced Propagation Delays  
• AC Types Feature 1.5V to 5.5V Operation and  
Balanced Noise Immunity at 30% of the Supply  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
±24mA Output Drive Current  
- Fanout to 15 FAST™ ICs  
2. Wafer and die for this part number is available which meets all elec-  
trical specifications. Please contact your local sales office or Harris  
customer service for ordering information.  
/Sub-  
ject  
- Drives 50Transmission Lines  
(Triple  
3-Input  
NAND  
Gate)  
/Autho  
r ()  
/Key-  
words  
(Har-  
ris  
Semi-  
con-  
ductor,  
Advan  
ced  
Pinout  
Functional Diagram  
CD74AC10, CD74ACT10  
(PDIP, SOIC)  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
V
1A  
1B  
CC  
TOP VIEW  
1C  
1Y  
3C  
3B  
3A  
3Y  
2A  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 1C  
12 1Y  
11 3C  
10 3B  
2B  
2A  
2C  
2B  
2C  
2Y  
2Y  
9
8
3A  
3Y  
8
GND  
GND  
TRUTH TABLE  
CMOS  
,Harris  
Semi-  
con-  
INPUTS  
OUTPUTS  
nA  
L
nB  
L
nC  
L
nY  
H
H
H
H
H
H
H
L
ductor,  
Advan  
ced  
TTL)  
/Cre-  
ator ()  
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
FAST™ is a Trademark of Fairchild Semiconductor.  
Copyright © Harris Corporation 1998  
File Number 1977.1  
1

与CD74ACT10相关器件

型号 品牌 获取价格 描述 数据表
CD74ACT109 TI

获取价格

DUAL J-K FLIP-FLOP WITH SET RESET
CD74ACT109E GE

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
CD74ACT109E TI

获取价格

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
CD74ACT109EE4 TI

获取价格

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
CD74ACT109EN ETC

获取价格

Logic IC
CD74ACT109EX GE

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
CD74ACT109F ETC

获取价格

Logic IC
CD74ACT109M TI

获取价格

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
CD74ACT109M GE

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
CD74ACT109M96 TI

获取价格

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET