CD54/74AC02,
CD54/74ACT02
Data sheet acquired from Harris Semiconductor
SCHS224A
Quad 2-Input NOR Gate
September 1998 - Revised May 2000
Features
Description
• Typical Propagation Delay
o
The ‘AC02 and ‘ACT02 are quad 2-input NOR gates that utilize
Advanced CMOS Logic technology.
- 6ns at V
= 5V, T = 25 C, C = 50pF
A L
CC
• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
Ordering Information
• SCR-Latchup-Resistant CMOS Process and Circuit
Design
PART
NUMBER
TEMP.
o
RANGE ( C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
14 Ld CERDIP
14 Ld PDIP
CD54AC02F3A
CD74AC02E
CD74AC02M
CD54ACT02F3A
CD74ACT02E
CD74ACT02M
NOTES:
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
[ /Title
(CD74
AC02,
CD74
ACT02
)
• Balanced Propagation Delays
14 Ld SOIC
14 Ld CERDIP
14 Ld PDIP
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
14 Ld SOIC
/Sub-
ject
- Drives 50Ω Transmission Lines
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
(Quad
2-Input
NOR
Gate)
/Autho
r ()
/Key-
words
(Har-
ris
2. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local TI sales office or cus-
tomer service for ordering information.
Pinout
Functional Diagram
CD54AC02, CD54ACT02
(CERDIP)
CD74AC02, CD74ACT02
(PDIP, SOIC)
2
3
1A
1B
1
1Y
2Y
TOP VIEW
5
6
4
2A
2B
8
9
Semi-
con-
ductor,
Advan
ced
CMOS
,Harris
Semi-
con-
10
3A
3B
1Y
1A
1
2
3
4
5
6
7
14 V
CC
3Y
4Y
13 4Y
12 4B
11 4A
10 3Y
11
12
13
4A
4B
1B
GND = 7
= 14
V
2Y
CC
2A
2B
9
8
3B
3A
TRUTH TABLE
INPUTS
GND
OUTPUTS
ductor,
Advan
ced
TTL)
/Cre-
ator ()
A
L
B
L
Y
H
L
H
L
L
H
H
L
H
L
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
1
Copyright © 2000, Texas Instruments Incorporated