生命周期: | Obsolete | 包装说明: | , |
Reach Compliance Code: | unknown | 风险等级: | 5.69 |
系列: | AC | JESD-30 代码: | R-PDSO-G14 |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | NAND GATE |
功能数量: | 3 | 输入次数: | 3 |
端子数量: | 14 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 封装主体材料: | PLASTIC/EPOXY |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
传播延迟(tpd): | 12.2 ns | 认证状态: | Not Qualified |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 1.5 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | MILITARY |
端子形式: | GULL WING | 端子位置: | DUAL |
Base Number Matches: | 1 |
型号 | 品牌 | 描述 | 获取价格 | 数据表 |
CD74AC10MG4 | TI | AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14 |
获取价格 |
|
CD74AC10MG4 | ROCHESTER | NAND Gate, AC Series, 3-Func, 3-Input, CMOS, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14 |
获取价格 |
|
CD74AC10MX | GE | NAND Gate, AC Series, 3-Func, 3-Input, CMOS, PDSO14, |
获取价格 |
|
CD74AC112 | TI | DUAL J-K FLIP-FLOP WITH SET RESET |
获取价格 |
|
CD74AC112E | TI | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET |
获取价格 |
|
CD74AC112E | ROCHESTER | AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, PLAST |
获取价格 |