CD74AC00,
CD74ACT00
Data sheet acquired from Harris Semiconductor
SCHS223
September 1998
Quad 2-Input NAND Gate
Features
Description
• Typical Propagation Delay
o
The CD74AC00 and CD74ACT00 are quad 2-input NAND
gates that utilize the Harris Advanced CMOS Logic technology.
- 3.2ns at V
= 5V, T = 25 C, C = 50pF
A L
CC
• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
Ordering Information
• SCR-Latchup-Resistant CMOS Process and Circuit
Design
PART
NUMBER
TEMP.
PKG.
NO.
o
RANGE ( C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
14 Ld PDIP
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
CD74AC00E
CD74ACT00E
CD74AC00M
CD74ACT00M
NOTES:
E14.3
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
[ /Title
(CD74
AC00,
CD74
ACT00
)
E14.3
• Balanced Propagation Delays
M14.15
M14.15
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
/Sub-
ject
2. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or Harris
customer service for ordering information.
- Drives 50Ω Transmission Lines
(Quad
2-Input
NAND
Gate)
/Autho
r ()
/Key-
words
(Har-
ris
Semi-
con-
ductor,
Advan
ced
Pinout
Functional Diagram
CD74AC00, CD74ACT00
(PDIP, SOIC)
1
TOP VIEW
3
6
8
1A
1B
1Y
2Y
2
4
5
2A
2B
1A
1B
1
2
3
4
5
6
7
14 V
CC
13 4A
12 4B
11 4Y
10 3A
9
3B
3A
3Y
4Y
10
1Y
12
13
11
4B
4A
2A
GND = 7
= 14
2B
V
CC
2Y
9
8
3B
3Y
GND
TRUTH TABLE
INPUTS
CMOS
,Harris
Semi-
con-
ductor,
Advan
ced
TTL)
/Cre-
ator ()
OUTPUTS
A
L
B
L
Y
H
H
H
L
H
L
L
H
H
H
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
Copyright © Harris Corporation 1998
File Number 1855.1
1