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CD54HCT240 PDF预览

CD54HCT240

更新时间: 2024-11-03 22:03:27
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德州仪器 - TI 驱动器
页数 文件大小 规格书
12页 280K
描述
High-Speed CMOS Logic Octal Buffer/Line Drivers, Three-State

CD54HCT240 数据手册

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CD54/74HC240, CD54/74HCT240,  
CD74HC241, CD54/74HCT241,  
CD54/74HC244, CD54/74HCT244  
High-Speed CMOS Logic  
Data sheet acquired from Harris Semiconductor  
SCHS167E  
November 1997 - Revised October 2004  
Octal Buffer/Line Drivers, Three-State  
Features  
Ordering Information  
• HC/HCT240 Inverting  
TEMP. RANGE  
o
PART NUMBER  
CD54HC240F3A  
CD54HC244F3A  
CD54HCT240F3A  
CD54HCT241F3A  
CD54HCT244F3A  
CD74HC240E  
( C)  
PACKAGE  
20 Ld CERDIP  
20 Ld CERDIP  
20 Ld CERDIP  
20 Ld CERDIP  
20 Ld CERDIP  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld TSSOP  
20 Ld TSSOP  
20 Ld TSSOP  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
• HC/HCT241 Non-Inverting  
• HC/HCT244 Non-Inverting  
[ /Title  
(CD74  
HC240  
,
CD74  
HCT24  
0,  
CD74  
HC241  
,
CD74  
HCT24  
1,  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Typical Propagation Delay = 8ns at V  
o
= 5V,  
CC  
C = 15pF, T = 25 C for HC240  
L
A
• Three-State Outputs  
• Buffered Inputs  
• High-Current Bus Driver Outputs  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
CD74HC240M  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
CD74HC240M96  
CD74HC241E  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
CD74HC241M  
CD74  
HC244  
,
CD74HC241M96  
CD74HC244E  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
CD74  
CD74HC244M  
at V  
= 5V  
CC  
• HCT Types  
CD74HC244M96  
CD74HCT240E  
CD74HCT240M  
CD74HCT240M96  
CD74HCT240PW  
CD74HCT240PWR  
CD74HCT240PWT  
CD74HCT241E  
CD74HCT241M  
CD74HCT241M96  
CD74HCT244E  
CD74HCT244M  
CD74HCT244M96  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
Description  
The ’HC240 and ’HCT240 are inverting three-state buffers  
having two active-low output enables. The CD74HC241,  
’HCT241, ’HC244 and ’HCT244 are non-inverting three-  
state buffers that differ only in that the 241 has one active-  
high and one active-low output enable, and the 244 has two  
active-low output enables. All three types have identical  
pinouts.  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2004, Texas Instruments Incorporated  
1

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