CD54HC4002, CD74HC4002
Data sheet acquired from Harris Semiconductor
SCHS197E
High-Speed CMOS Logic
Dual 4-Input NOR Gate
August 1997 - Revised October 2003
Features
Description
• Typical Propagation Delay = 8ns at V
o
= 5V,
The ’HC4002 logic gate utilizes silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The ’HC4002 logic family is functional as well
as pin compatible with the standard LS logic family.
CC
C = 15pF, T = 25 C
L
A
[ /Title
(CD74H
C4002)
/Subject
(High
Speed
CMOS
Logic
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
Ordering Information
TEMP. RANGE
o
PART NUMBER
CD54HC4002F3A
CD74HC4002E
( C)
PACKAGE
14 Ld CERDIP
14 Ld PDIP
• Significant Power Reduction Compared to LSTTL
Logic ICs
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
Dual 4-
Input
NOR
• HC Types
- 2V to 6V Operation
CD74HC4002M
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
14 Ld SOP
- High Noise Immunity: N = 30%, N = 30%of V
IL IH
at
CC
V
= 5V
CD74HC4002MT
CD74HC4002M96
CD74HC4002NSR
CD74HC4002PW
CD74HC4002PWR
CD74HC4002PWT
CC
Gate)
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
Pinout
CD54HC4002
(CERDIP)
CD74HC4002
(PDIP, SOIC, SOP, TSSOP)
TOP VIEW
1Y
1A
1
2
3
4
5
6
7
14 V
CC
13 2Y
12 2D
11 2C
10 2B
1B
1C
1D
NC
GND
9
8
2A
NC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1