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CD54HC393_07

更新时间: 2024-11-29 05:09:03
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德州仪器 - TI 计数器
页数 文件大小 规格书
15页 416K
描述
High-Speed CMOS Logic Dual 4-Stage Binary Counter

CD54HC393_07 数据手册

 浏览型号CD54HC393_07的Datasheet PDF文件第2页浏览型号CD54HC393_07的Datasheet PDF文件第3页浏览型号CD54HC393_07的Datasheet PDF文件第4页浏览型号CD54HC393_07的Datasheet PDF文件第5页浏览型号CD54HC393_07的Datasheet PDF文件第6页浏览型号CD54HC393_07的Datasheet PDF文件第7页 
CD54HC393, CD74HC393,  
CD54HCT393, CD74HCT393  
Data sheet acquired from Harris Semiconductor  
SCHS186E  
High-Speed CMOS Logic  
Dual 4-Stage Binary Counter  
September 1997 - Revised August 2003  
Features  
Description  
• Fully Static Operation  
• Buffered Inputs  
The ’HC393 and ’HCT393 are 4-stage ripple-carry binary  
counters. All counter stages are master-slave flip-flops. The  
state of the stage advances one count on the negative  
transition of each clock pulse; a high voltage level on the MR  
line resets all counters to their zero state. All inputs and  
outputs are buffered.  
[ /Title  
(CD74  
HC393  
,
CD74  
HCT39  
3)  
/Sub-  
ject  
(High  
Speed  
CMOS  
• Common Reset  
• Negative-Edge Clocking  
• Fanout (Over Temperature Range)  
Ordering Information  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
TEMP. RANGE  
o
PART NUMBER  
CD54HC393F3A  
CD54HCT393F3A  
CD74HC393E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
CD74HC393M  
- 2V to 6V Operation  
CD74HC393MT  
CD74HC393M96  
CD74HCT393E  
CD74HCT393M  
CD74HCT393MT  
CD74HCT393M96  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
CD54HC393, CD54HCT393  
(CERDIP)  
CD74HC393, CD74HCT393  
(PDIP, SOIC)  
TOP VIEW  
1CP  
1MR  
1Q0  
1Q1  
1Q2  
1Q3  
GND  
1
2
3
4
5
6
7
14 V  
CC  
13 2CP  
12 2MR  
11 2Q0  
10 2Q1  
9
8
2Q2  
2Q3  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

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