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CD54HC373 PDF预览

CD54HC373

更新时间: 2024-10-31 22:00:31
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
9页 310K
描述
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

CD54HC373 数据手册

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CD54HC373, CD74HC373  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCLS452A – FEBRUARY 2001 – REVISED APRIL 2003  
CD54HC373 . . . F PACKAGE  
CD74HC373 . . . E OR M PACKAGE  
(TOP VIEW)  
2-V to 6-V V  
Operation  
CC  
Wide Operating Temperature Range of  
–55°C to 125°C  
Balanced Propagation Delays and  
Transition Times  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
LE  
Standard Outputs Drive up to 15 LS-TTL  
Loads  
Significant Power Reduction Compared to  
LS-TTL Logic ICs  
description/ordering information  
The ’HC373 devices are octal transparent D-type  
GND  
latches designed for 2-V to 6-V V  
operation.  
CC  
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs  
are latched at the logic levels of the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines  
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without  
interface or pullup components.  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – E  
Tube  
Tube  
CD74HC373E  
CD74HC373E  
CD74HC373M  
CD74HC373M96  
CD54HC373F3A  
–55°C to 125°C  
SOIC – M  
HC373M  
Tape and reel  
Tube  
CDIP – F  
CD54HC373F3A  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CD54HC373 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC373 TI

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