CD54/74HC367, CD54/74HCT367,
CD54/74HC368, CD74HCT368
Data sheet acquired from Harris Semiconductor
SCHS181D
High-Speed CMOS Logic Hex Buffer/Line Driver,
Three-State Non-Inverting and Inverting
November 1997 - Revised October 2003
Features
Ordering Information
TEMP. RANGE
o
• Buffered Inputs
PART NUMBER
CD54HC367F3A
CD54HC368F3A
CD54HCT367F3A
CD74HC367E
( C)
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
• High Current Bus Driver Outputs
• Two Independent Three-State Enable Controls
[ /Title
(CD74
HC367
,
CD74
HCT36
7,
CD74
HC368
,
CD74
HCT36
8)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
• Typical Propagation Delay t
, t
= 8ns at V = 5V,
CC
PLH PHL
o
C = 15pF, T = 25 C
L
A
CD74HC367M
• Fanout (Over Temperature Range)
CD74HC367MT
CD74HC367M96
CD74HC368E
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
CD74HC368M
CD74HC368MT
CD74HC368M96
CD74HCT367E
CD74HCT367M
CD74HCT367MT
CD74HCT367M96
CD74HCT368E
CD74HCT368M
CD74HCT368MT
CD74HCT368M96
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
/Sub-
ject
(High
Speed
- High Noise Immunity: N = 30%, N = 30% of V
CC
IL
IH
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
Description
The ’HC367, ’HCT367, ’HC368, and CD74HCT368 silicon gate
CMOS three-state buffers are general purpose high-speed
non-inverting and inverting buffers. They have high drive cur-
rent outputs which enable high speed operation even when
driving large bus capacitances. These circuits possess the low
power dissipation of CMOS circuitry, yet have speeds compara-
ble to low power Schottky TTL circuits. Both circuits are capable
of driving up to 15 low power Schottky inputs.
The ’HC367 and ’HCT367 are non-inverting buffers, whereas
the ’HC368 and CD74HCT368 are inverting buffers. These
devices have two output enables, one enable (OE1) controls 4
gates and the other (OE2) controls the remaining 2 gates.
The ’HCT367 and CD74HCT368 logic families are speed, func-
tion and pin compatible with the standard LS logic family.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
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