CD54/74HC30,
CD54/74HCT30
Data sheet acquired from Harris Semiconductor
SCHS121B
High Speed CMOS Logic
8-Input NAND Gate
August 1997 - Revised March 2002
Features
Description
• Buffered Inputs
The ’HC30 and ’HCT30 each contain an 8-input NAND gate
in one package. They provide the system designer with the
direct implementation of the positive logic 8-input NAND
function. Logic gates utilize silicon gate CMOS technology to
achieve operating speeds similar to LSTTL gates with the
low power consumption of standard CMOS integrated cir-
cuits. All devices have the ability to drive 10 LSTTL loads.
The HCT logic family is functionally pin compatible with the
• Typical Propagation Delay: 10ns at V
o
= 5V,
[ /Title
(CD54H
C30,
CD74H
C30,
CC
C = 15pF, T = 25 C
L
A
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C standard LS logic family.
CD74H
CT30)
/Subject
(High
Speed
CMOS
Logic 8-
• Balanced Propagation Delay and Transition Times
Ordering Information
• Significant Power Reduction Compared to LSTTL
Logic ICs
TEMP. RANGE
o
PART NUMBER
CD54HC30F
( C)
PACKAGE
14 Ld CERDIP
14 Ld CERDIP
14 Ld PDIP
14 Ld SOIC
14 Ld SOP
• HC Types
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
- 2V to 6V Operation
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
CD54HC30F3A
CD74HC30E
CD74HC30M
CD54HC30NSR
CD54HCT30F3A
CD54HCT30H
CD74HCT30E
CD74HCT30M
NOTES:
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
14 Ld CERDIP
Die
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
14 Ld PDIP
14 Ld SOIC
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die for this part number is available which meets all electrical
specifications. Please contact your local TI sales office or cus-
tomer service for ordering information.
Pinout
CD54HC30, CD54HCT30 (CERDIP)
CD74HC30 (PDIP, SOIC, SOP)
CD74HCT30 (PDIP, SOIC)
TOP VIEW
A
B
1
2
3
4
5
6
7
14 V
CC
13 NC
C
12
11
H
G
D
E
10 NC
F
9
8
NC
Y
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2002, Texas Instruments Incorporated.
1