生命周期: | Obsolete | 包装说明: | , DIE OR CHIP |
Reach Compliance Code: | unknown | 风险等级: | 5.82 |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | AND GATE |
最大I(ol): | 0.004 A | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 封装等效代码: | DIE OR CHIP |
电源: | 2/6 V | Prop。Delay @ Nom-Sup: | 27 ns |
认证状态: | Not Qualified | 施密特触发器: | NO |
子类别: | Gates | 技术: | CMOS |
温度等级: | MILITARY |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CD54HC08H/3 | RENESAS |
获取价格 |
HC/UH SERIES, QUAD 2-INPUT AND GATE, UUC14 | |
CD54HC08H/3A | RENESAS |
获取价格 |
AND Gate, HC/UH Series, 4-Func, 2-Input, CMOS | |
CD54HC08M | ETC |
获取价格 |
Logic IC | |
CD54HC10 | TI |
获取价格 |
High-Speed CMOS Logic Triple 3-Input NAND Gate | |
CD54HC10_03 | TI |
获取价格 |
High-Speed CMOS Logic Triple 3-Input NAND Gate | |
CD54HC10_06 | TI |
获取价格 |
High-Speed CMOS Logic Triple 3-Input NAND Gate | |
CD54HC10_14 | TI |
获取价格 |
High-Speed CMOS Logic Triple 3-Input NAND Gate | |
CD54HC107 | TI |
获取价格 |
Dual J-K Flip-Flop with Reset Negative-Edge Trigger | |
CD54HC107_08 | TI |
获取价格 |
Dual J-K Flip-Flop with Reset Negative-Edge Trigger | |
CD54HC107E | ETC |
获取价格 |
Logic IC |