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CD54FCT245 PDF预览

CD54FCT245

更新时间: 2024-09-18 00:00:55
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德州仪器 - TI /
页数 文件大小 规格书
8页 46K
描述
BiCMOS FCT Interface Logic, Octal-Bus Tranceivers, Three-State

CD54FCT245 数据手册

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CD54FCT245,  
CD74FCT245  
Data sheet acquired from Harris Semiconductor  
SCHS271A  
BiCMOS FCT Interface Logic,  
January 1997 - Revised October 1999  
Octal-Bus Tranceivers, Three-State  
Features  
Description  
• Buffered Inputs  
The CD54/74FCT245 octal bus transceiver uses a small  
geometry BiCMOS technology. The output stage is a combi-  
nation of bipolar and CMOS transistors that limits the output  
• Typical Propagation Delay: 5.0ns at V  
o
= 5V,  
CC  
T = 25 C  
A
HIGH level to two diode drops below V . This resultant  
CC  
• Noninverting  
lowering of output swing (0V to 3.7V) reduces power bus  
• SCR Latchup Resistant BiCMOS Process and  
Circuit Design  
ringing (a source of EMI) and minimizes V  
bounce and  
CC  
ground bounce and their effects during simultaneous output  
switching. The output configuration also enhances switching  
speed and is capable of sinking 48mA to 64mA.  
• Speed of Bipolar FAST™/AS/S  
• 64mA Output Sink Current (74 Series)  
• 48mA Output Sink Current (54 Series)  
The CD54/74FCT245 is a noninverting, three-state, bidirec-  
tional transceiver/buffer intended for two-way transmission  
from”A” bus to “B” bus or “B” bus to “A” bus. The logic level  
present on the Direction Input (DIR) determines the data direc-  
tion. When the Output Enable input is HIGH, the outputs are in  
the high impedance state.  
• Output Voltage Swing Limited to 3.7V at V  
• Controlled Output Edge Rates  
= 5V  
CC  
• Input/Output Isolation to V  
CC  
• BiCMOS Technology with Low Quiescent Power  
Ordering Information  
TEMP.  
RANGE ( C)  
0 to 70  
PKG.  
NO.  
o
PART NUMBER  
CD74FCT245E  
CD74FCT245M  
CD54FCT245E  
PACKAGE  
20 Ld PDIP  
20 Ld SOIC  
E20.3  
0 to 70  
M20.3  
E20.3  
-55 to 125 20 Ld PDIP  
NOTE: When ordering the suffix M and SM packages, use the entire  
part number. Add the suffix 96 to obtain the variant in the tape and reel.  
Pinout  
CD54FCT245, CD74FCT245  
(PDIP, SOIC)  
TOP VIEW  
1
2
3
4
5
6
7
8
9
V
DIR  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
20  
19  
CC  
OE  
18 B0  
17 B1  
16 B2  
15 B3  
14 B4  
13 B5  
12  
B6  
GND 10  
11 B7  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
1
FAST™ is a trademark of Fairchild Semiconductor.  
Copyright © 1999, Texas Instruments Incorporated  

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