CD54AC191,
CD54ACT191
Data sheet acquired from Harris Semiconductor
SCHS243A
Presettable Synchronous 4-Bit Binary
Up/Down Counter
October 1998 - Revised May 2000
Features
Description
• Buffered Inputs
The CD54AC191 and CD54ACT191 are asynchronously
presettable binary up/down synchronous counters that utilize
Advanced CMOS Logic technology. Presetting the counter to
the number on preset data inputs (P0-P3) is accomplished
by setting LOW the asynchronous parallel load input (PL).
Counting occurs when PL is HIGH, Count Enable (CE) is
LOW, and the Up/Down (U/D) input is either LOW for up-
counting or HIGH for down-counting. The counter is incre-
mented or decremented synchronously with the LOW-to-
HIGH transition of the clock.
• Typical Propagation Delay
o
- 12.8ns at V
= 5V, T = 25 C, C = 50pF
A L
CC
• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
• SCR-Latchup-Resistant CMOS Process and Circuit
Design
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
When an overflow or underflow of the counter occurs, the
Terminal Count (TC) output, which is LOW during counting,
goes HIGH and remains HIGH for one clock cycle. This out-
put can be used for look-ahead carry in high-speed cascad-
ing (see Figure 12). The TC output also initiates the Ripple
Clock (RC) output which, normally HIGH, goes LOW and
remains LOW for the low-level cascaded using the Ripple
Count output.
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
- Drives 50Ω Transmission Lines
Ordering Information
Pinout
PART
NUMBER
TEMP.
CD54AC191, CD54ACT191
(CERDIP)
o
RANGE ( C)
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
TOP VIEW
CD54AC191F3A
CD54ACT191F3A
NOTES:
P1
Q1
1
2
3
4
5
6
7
8
16 V
CC
15 P0
14 CP
13 RC
12 TC
11 PL
10 P2
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
Q0
CE
2. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local TI sales office or cus-
tomer service for ordering information.
U/D
Q2
Q3
9
P3
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
1
Copyright © 2000, Texas Instruments Incorporated