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CD4541BCMX_NL PDF预览

CD4541BCMX_NL

更新时间: 2024-09-23 21:11:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 82K
描述
Binary Counter, 4000/14000/40000 Series, Asynchronous, Negative Edge Triggered, 14-Bit, Up Direction, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012, SOIC-14

CD4541BCMX_NL 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.58计数方向:UP
系列:4000/14000/40000JESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.65 mm
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
工作模式:ASYNCHRONOUS位数:14
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):1300 ns认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:NEGATIVE EDGE
宽度:3.9 mm最小 fmax:4 MHz
Base Number Matches:1

CD4541BCMX_NL 数据手册

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October 1987  
Revised May 2002  
CD4541BC  
Programmable Timer  
General Description  
Features  
Available division ratios 28, 210, 213, or 216  
The CD4541BC Programmable Timer is designed with a  
16-stage binary counter, an integrated oscillator for use  
with an external capacitor and two resistors, output control  
logic, and a special power-on reset circuit. The special fea-  
tures of the power-on reset circuit are first, no additional  
static power consumption and second, the part functions  
across the full voltage range (3V–15V) whether power-on  
reset is enabled or disabled.  
Increments on positive edge clock transitions  
Built-in low power RC oscillator (±2% accuracy over  
temperature range and ±10% supply and ±3% over pro-  
cessing @ < 10 kHz)  
Oscillator frequency range DC to 100 kHz  
Oscillator may be bypassed if external clock is available  
(apply external clock to pin 3)  
Timing and the counter are initialized by turning on power,  
if the power-on reset is enabled. When the power is  
already on, an external reset pulse will also initialize the  
timing and counter. After either reset is accomplished, the  
oscillator frequency is determined by the external RC net-  
work. The 16-stage counter divides the oscillator frequency  
by any of 4 digitally controlled division ratios.  
Automatic reset initializes all counters when power turns  
on  
External master reset totally independent of automatic  
reset operation  
Operates at 2n frequency divider or single transition  
timer  
Q/Q select provides output logic level flexibility  
Reset (auto or master) disables oscillator during reset-  
ting to provide no active power dissipation  
Clock conditioning circuit permits operation with very  
slow clock rise and fall times  
Wide supply voltage range—3.0V to 15V  
High noise immunity—0.45 VDD (typ.)  
5V–10V–15V parameter ratings  
Symmetrical output characteristics  
Maximum input leakage 1 µA at 15V over full tempera-  
ture range  
High output drive (pin 8) min. one TTL load  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4541BCM  
CD4541BCN  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Connection Diagram  
N.C.Not connected  
Top View  
© 2002 Fairchild Semiconductor Corporation  
DS006001  
www.fairchildsemi.com  

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