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CD4512

更新时间: 2024-11-08 22:40:27
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 145K
描述
8-Channel Buffered Data Selector

CD4512 数据手册

 浏览型号CD4512的Datasheet PDF文件第2页浏览型号CD4512的Datasheet PDF文件第3页浏览型号CD4512的Datasheet PDF文件第4页浏览型号CD4512的Datasheet PDF文件第5页浏览型号CD4512的Datasheet PDF文件第6页 
February 1988  
CD4512BM/CD4512BC 8-Channel Buffered Data Selector  
General Description  
Features  
Y
Wide supply voltage range  
3.0V to 15V  
0.45 V (typ.)  
The CD4512BM/CD4512BC buffered 8-channel data selec-  
tor is a complementary MOS (CMOS) circuit constructed  
with N- and P-channel enhancement mode transistors. This  
data selector is primarily used as a digital signal multiplexer  
selecting 1 of 8 inputs and routing the signal to a TRI-  
Y
High noise immunity  
DD  
Y
TRI-STATE output  
Y
Low quiescent power dissipation  
0.25 mW/package  
@
e
5.0V  
(typ.)  
V
CC  
STATE output. A high level at the Inhibit input forces a low  
É
Y
Plug-in replacement for Motorola MC14512  
level at the output. A high level at the Output Enable (OE)  
input forces the output into the TRI-STATE condition. Low  
levels at both the Inhibit and (OE) inputs allow normal oper-  
ation.  
Connection Diagram and Truth Table  
Dual-In-Line Package  
Order Number CD4512B  
TL/F/5993–1  
Top View  
Address Inputs  
Control Inputs  
Output  
Z
C
B
A
Inhibit  
OE  
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
j
0
0
0
0
0
0
0
0
0
1
X0  
X1  
X2  
X3  
X4  
X5  
X6  
X7  
0
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
j
j
j
j
j
j
Hi-Z  
e
j
Don’t care  
e
Hi-Z  
TRI-STATE condition  
e
Xn  
Data at input n  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/5993  
RRD-B30M105/Printed in U. S. A.  

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