Datasheet > CD4504BMS

CD4504BMS

更新时间： 2024-09-13 22:54:23

品牌	Logo	应用领域
英特矽尔 - INTERSIL		转换器电平转换器
页数	文件大小	规格书
8页	63K
描述
CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation

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CD4504BMS 数据手册

CD4504BMS

CMOS Hex Voltage Level Shifter for

TTL-to-CMOS or CMOS-to-CMOS Operation

December 1992

Features

Pinout

CD4504BMS

TOP VIEW

• High Voltage Type (20V Rating)

• Independence of Power Supply Sequence Consider-

ations

VCC

AOUT

AIN

16 VDD

- VCC can Exceed VDD

15 FOUT

14 FIN

- Input Signals can Exceed Both VCC and VDD

• Up and Down Level Shifting Capability

BOUT

BIN

13 SELECT

12 EOUT

11 EIN

• Shiftable Input Threshold for Either CMOS or TTL

Compatibility

COUT

CIN

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

10 DOUT

DIN

VSS

• Standardized Symmetrical Output Characteristics

• Maximum Input Current of 1µA at 18V Over Full Pack-

age Temperature Range; 100nA at 18V and +25^oC

• Meets All Requirements of JEDEC Tentative Standard

No. 13B, “Standard Speciﬁcations for Description of

‘B’ Series CMOS Devices”

Functional Diagram

VCC

VDD

Description

* IN

OUT

CD4504BMS hex voltage level shifter consists of six circuits

which shift input signals from the VCC logic level to the VDD

logic level. To shift TTL signals to CMOS logic levels, the

SELECT input is at the VCC HIGH logic state. When the

SELECT input is at a LOW logic state, each circuit translates

signals from one CMOS level to another.

LEVEL

SHIFTER

(3, 5, 7, 9, 11, 14)

(2, 4, 6, 10, 12, 15)

VCC = PIN 1

VDD = PIN 16

VSS = PIN 8

TTL/CMOS

MODE SELECT

SELECT

The CD4504BMS is supplied in these 16-lead outline packages:

Frit Seal DIP

H1F

Ceramic Flatpack

H6W

VDD

ALL INPUTS ARE PROTECTED

BY CMOS PROTECTION

NETWORK

VSS

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 3336

7-1140

12 3 4 5 6 7 8

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