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CD4503BC

更新时间: 2024-11-03 22:40:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
6页 65K
描述
Hex Non-Inverting 3-STATE Buffer

CD4503BC 数据手册

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October 1987  
Revised January 1999  
CD4503BC  
Hex Non-Inverting 3-STATE Buffer  
General Description  
Features  
The CD4503BC is a hex non-inverting 3-STATE buffer with  
high output current sink and source capability. 3-STATE  
outputs make it useful in bus-oriented applications. Two  
separate disable inputs are provided. Buffers 1 through 4  
are controlled by the disable 4 input. Buffers 5 and 6 are  
controlled by the disable 2 input. A high level on either dis-  
able input will cause those gates on its control line to go  
into a high impedance state.  
Wide supply voltage range: 3.0 VDC to 18 VDC  
3-STATE outputs  
Symmetrical turn on/turn off delays  
Symmetrical output rise and fall times  
Pin-for-pin replacement for MM80C97 and MC14503  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4503BCM  
CD4503BCSJ  
CD4503BCN  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Schematic Diagram  
Pin Assignments for DIP, SOIC and SOP  
Truth Table  
In  
Disable  
Out  
Input  
0
1
X
0
0
1
0
1
3-STATE  
Top View  
X = Don't Care  
© 1999 Fairchild Semiconductor Corporation  
DS005989.prf  
www.fairchildsemi.com  

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