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CD4081BFB3A PDF预览

CD4081BFB3A

更新时间: 2024-11-18 22:27:35
品牌 Logo 应用领域
德州仪器 - TI 栅极逻辑集成电路
页数 文件大小 规格书
12页 529K
描述
CMOS AND GATES

CD4081BFB3A 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:CERAMIC, DIP-14针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.6Is Samacsys:N
系列:4000/14000/40000JESD-30 代码:R-GDIP-T14
长度:19.56 mm逻辑集成电路类型:AND GATE
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE传播延迟(tpd):250 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

CD4081BFB3A 数据手册

 浏览型号CD4081BFB3A的Datasheet PDF文件第2页浏览型号CD4081BFB3A的Datasheet PDF文件第3页浏览型号CD4081BFB3A的Datasheet PDF文件第4页浏览型号CD4081BFB3A的Datasheet PDF文件第5页浏览型号CD4081BFB3A的Datasheet PDF文件第6页浏览型号CD4081BFB3A的Datasheet PDF文件第7页 
The CD4073B, CD4081B, and CD4082B types  
are supplied in 14-lead hermetic dual-in-line  
ceramic packages (F3A suffix), 14-lead  
dual-in-lineplasticpackages(Esuffix),14-lead  
small-outline packages (M, MT, M96, and NSR  
suffixes), and 14-lead thin shrink small-outline  
packages (PW and PWR suffixes).  
Copyright 2003, Texas Instruments Incorporated  

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