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CD4070B-MIL PDF预览

CD4070B-MIL

更新时间: 2024-11-05 11:07:07
品牌 Logo 应用领域
德州仪器 - TI 石英晶振栅极
页数 文件大小 规格书
8页 70K
描述
军用 4 通道、4 输入、3V 至 18V XOR(异或)门

CD4070B-MIL 数据手册

 浏览型号CD4070B-MIL的Datasheet PDF文件第2页浏览型号CD4070B-MIL的Datasheet PDF文件第3页浏览型号CD4070B-MIL的Datasheet PDF文件第4页浏览型号CD4070B-MIL的Datasheet PDF文件第5页浏览型号CD4070B-MIL的Datasheet PDF文件第6页浏览型号CD4070B-MIL的Datasheet PDF文件第7页 
CD4070B,  
CD4077B  
Data sheet acquired from Harris Semiconductor  
SCHS055  
CMOS Quad Exclusive-OR  
and Exclusive-NOR Gate  
January 1998  
Features  
Description  
• High-Voltage Types (20V Rating)  
• CD4070B - Quad Exclusive-OR Gate  
• CD4077B - Quad Exclusive-NOR Gate  
• Medium Speed Operation  
The Harris CD4070B contains four independent Exclusive-  
OR gates. The Harris CD4077B contains four independent  
Exclusive-NOR gates.  
[ /Title  
(CD40  
70B,  
CD407  
7B)  
/Sub-  
ject  
(CMO  
SQuad  
Exclu-  
sive-  
The CD4070B and CD4077B provide the system designer  
with a means for direct implementation of the Exclusive-OR  
and Exclusive-NOR functions, respectively.  
- t  
, t  
PHL PLH  
= 65ns (Typ) at V = 10V, C = 50pF  
DD L  
• 100% Tested for Quiescent Current at 20V  
• Standardized Symmetrical Output Characteristics  
• 5V, 10V and 15V Parametric Ratings  
Ordering Information  
TEMP.  
PKG.  
NO.  
o
PART NUMBER RANGE ( C)  
PACKAGE  
-55 to 125 14 Ld PDIP  
-55 to 125 14 Ld PDIP  
• Maximum Input Current of 1µA at 18V Over Full  
Package Temperature Range  
CD4070BE  
CD4077BE  
CD4070BF  
CD4077BF  
CD4070BM  
CD4077BM  
E14.3  
o
- 100nA at 18V and 25 C  
E14.3  
• Noise Margin (Over Full Package Temperature Range)  
OR  
and  
- 1V at V  
DD  
= 5V, 2V at V  
= 10V, 2.5V at V  
= 15V  
DD  
DD  
-55 to 125 14 Ld CERDIP  
-55 to 125 14 Ld CERDIP  
-55 to 125 14 Ld SOIC  
-55 to 125 14 Ld SOIC  
F14.3  
• Meets All Requirements of JEDEC Standard No. 13B,  
“Standard Specifications for Description of ‘B’ Series  
CMOS Devices  
F14.3  
Exclu-  
sive-  
NOR  
Gate)  
/Autho  
r ()  
M14.15  
M14.15  
Applications  
• Logical Comparators  
• Adders/Subtractors  
/Key-  
words  
(Har-  
ris  
Semi-  
con-  
• Parity Generators and Checkers  
Pinouts  
CD4070B  
(PDIP, CERDIP, SOIC)  
TOP VIEW  
CD4077B  
(PDIP, CERDIP, SOIC)  
TOP VIEW  
ductor,  
CD400  
0,  
metal  
gate,  
CMOS  
, pdip,  
cerdip,  
mil,  
A
B
B
D
C
D
1
2
3
4
5
6
7
14  
13  
12  
V
A
B
B
D
C
D
1
2
3
4
5
6
7
14  
13  
12  
V
DD  
DD  
H
G
H
G
J = A  
K = C  
J = A  
K = C  
11 M = G  
10 L = E  
H
11 M = G  
10 L = E  
H
F
F
9
8
F
E
9
8
F
E
V
V
SS  
SS  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 910.1  
Copyright © Harris Corporation 1998  
1

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