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CD4066BPWR

更新时间： 2024-11-19 22:54:19
品牌 Logo 应用领域
德州仪器 - TI 复用器开关复用器或开关信号电路光电二极管输出元件PC
页数 文件大小 规格书
20页 545K
描述
CMOS QUAD BILATERAL SWITCH

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中文翻译

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CD4066BPWR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：TSSOP
包装说明：GREEN, PLASTIC, TSSOP-14针数：14
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：0.75Samacsys Confidence：3
Samacsys Status：ReleasedSamacsys PartID：291116
Samacsys Pin Count：14Samacsys Part Category：Integrated Circuit
Samacsys Package Category：Small Outline PackagesSamacsys Footprint Name：CD4066BPWR
Samacsys Released Date：2019-02-15 05:08:14Is Samacsys：N
模拟集成电路 - 其他类型：SPST标称带宽：40 MHz
JESD-30 代码：R-PDSO-G14JESD-609代码：e3
长度：5 mm湿度敏感等级：1
标称负供电电压 (Vsup)：-5 V正常位置：NO
信道数量：4功能数量：4
端子数量：14通态电阻匹配规范：15 Ω
最大通态电阻 (Ron)：1050 Ω最高工作温度：125 °C
最低工作温度：-55 °C输出：SEPARATE OUTPUT
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP14,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：5/15 V认证状态：Not Qualified
座面最大高度：1 mm最大信号电流：0.025 A
子类别：Multiplexer or Switches最大供电电流 (Isup)：0.03 mA
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
最长断开时间：70 ns最长接通时间：70 ns
切换：BREAK-BEFORE-MAKE技术：CMOS
温度等级：MILITARY端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

CD4066BPWR 数据手册

 浏览型号CD4066BPWR的Datasheet PDF文件第2页浏览型号CD4066BPWR的Datasheet PDF文件第3页浏览型号CD4066BPWR的Datasheet PDF文件第4页浏览型号CD4066BPWR的Datasheet PDF文件第5页浏览型号CD4066BPWR的Datasheet PDF文件第6页浏览型号CD4066BPWR的Datasheet PDF文件第7页 
CD4066B  
CMOS QUAD BILATERAL SWITCH  
SCHS051D – NOVEMBER 1998 – REVISED SEPTEMBER 2003  
15-V Digital or 7.5-V Peak-to-Peak  
Switching  
Matched Control-Input to Signal-Output  
Capacitance: Reduces Output Signal  
Transients  
125-Ω Typical On-State Resistance for 15-V  
Operation  
Frequency Response, Switch On = 40 MHz  
Typical  
Switch On-State Resistance Matched to  
Within 5 Ω Over 15-V Signal-Input Range  
On-State Resistance Flat Over Full  
Peak-to-Peak Signal Range  
100% Tested for Quiescent Current at 20 V  
5-V, 10-V, and 15-V Parametric Ratings  
Meets All Requirements of JEDEC Tentative  
Standard No. 13-B, Standard Specifications  
for Description of “B” Series CMOS  
Devices  
High On/Off Output-Voltage Ratio: 80 dB  
Typical at f = 10 kHz, R = 1 kΩ  
is  
L
High Degree of Linearity: <0.5% Distortion  
Typical at f = 1 kHz, V = 5 V p-p,  
Applications:  
is  
is  
V
– V ≥ 10 V, R = 10 kΩ  
– Analog Signal Switching/Multiplexing:  
Signal Gating, Modulator, Squelch  
Control, Demodulator, Chopper,  
Commutating Switch  
DD  
SS  
L
Extremely Low Off-State Switch Leakage,  
Resulting in Very Low Offset Current and  
High Effective Off-State Resistance: 10 pA  
– Digital Signal Switching/Multiplexing  
– Transmission-Gate Logic Implementation  
– Analog-to-Digital and Digital-to-Analog  
Conversion  
– Digital Control of Frequency, Impedance,  
Phase, and Analog-Signal Gain  
Typical at V  
– V = 10 V, T = 25°C  
DD  
SS A  
Extremely High Control Input Impedance  
(Control Circuit Isolated From Signal  
12  
Circuit): 10 Ω Typical  
Low Crosstalk Between Switches: –50 dB  
Typical at f = 8 MHz, R = 1 kΩ  
is  
L
E, F, M, NS, OR PW PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
SIG A IN/OUT  
SIG A OUT/IN  
SIG B OUT/IN  
SIG B IN/OUT  
CONTROL B  
CONTROL C  
V
DD  
CONTROL A  
CONTROL D  
SIG D IN/OUT  
10 SIG D OUT/IN  
9
8
SIG C OUT/IN  
SIG C IN/OUT  
V
SS  
description/ordering information  
The CD4066B is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals.  
It is pin-for-pin compatible with the CD4016B, but exhibits a much lower on-state resistance. In addition, the  
on-state resistance is relatively constant over the full signal-input range.  
The CD4066B consists of four bilateral switches, each with independent controls. Both the p and the n devices  
in a given switch are biased on or off simultaneously by the control signal. As shown in Figure 1, the well of the  
n-channel device on each switch is tied to either the input (when the switch is on) or to V (when the switch  
SS  
is off). This configuration eliminates the variation of the switch-transistor threshold voltage with input signal and,  
thus, keeps the on-state resistance low over the full operating-signal range.  
The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply  
voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold  
applications, the CD4016B is recommended.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...20

中文翻译

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CD4066BPWR 替代型号

型号 品牌 替代类型 描述 数据表
CD4066BPW TI

类似代替

 CMOS QUAD BILATERAL SWITCH
CD4066BM TI

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 CMOS QUAD BILATERAL SWITCH
CD4066BE TI

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 CMOS QUAD BILATERAL SWITCH

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