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CD4063BFMSR PDF预览

CD4063BFMSR

更新时间： 2024-01-22 04:53:02
品牌 Logo 应用领域
瑞萨 - RENESAS 输出元件逻辑集成电路
页数 文件大小 规格书
8页 99K
描述
4000/14000/40000 SERIES, 4-BIT MAGNITUDE COMPARATOR, TRUE OUTPUT, CDIP16

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CD4063BFMSR 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP16,.3Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.74
其他特性：CASCADABLE系列：4000/14000/40000
JESD-30 代码：R-GDIP-T16JESD-609代码：e0
负载电容（CL）：50 pF逻辑集成电路类型：MAGNITUDE COMPARATOR
位数：4功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP16,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5/15 V传播延迟（tpd）：1688 ns
认证状态：Not Qualified筛选级别：38535V;38534K;883S
子类别：Arithmetic Circuits最大供电电压 (Vsup)：18 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

CD4063BFMSR 数据手册

 浏览型号CD4063BFMSR的Datasheet PDF文件第2页浏览型号CD4063BFMSR的Datasheet PDF文件第3页浏览型号CD4063BFMSR的Datasheet PDF文件第4页浏览型号CD4063BFMSR的Datasheet PDF文件第5页浏览型号CD4063BFMSR的Datasheet PDF文件第6页浏览型号CD4063BFMSR的Datasheet PDF文件第7页 
CD4063BMS  
CMOS 4-Bit Magnitude Comparator  
December 1992  
Features  
Pinout  
CD4063BMS  
TOP VIEW  
• High Voltage Type (20V Rating)  
• Expansion to 8, 12, 16 . . . 4N Bits by Cascading Units  
• Medium Speed Operation  
B3  
(A < B) IN  
(A = B) IN  
(A > B) IN  
(A > B) OUT  
(A = B) OUT  
(A < B) OUT  
VSS  
1
2
3
4
5
6
7
8
16 VDD  
15 A3  
14 B2  
13 A2  
12 A1  
11 B1  
10 A0  
- Compares Two 4-Bit Words in 250ns (Typ.) at 10V  
• 100% Tested for Quiescent Current at 20V  
• Standardized Symmetrical Output Characteristics  
• 5V, 10V and 15V Parametric Ratings  
• Maximum Input Current of 1µA at 18V Over Full Pack-  
age Temperature Range; 100nA at 18V and +25oC  
• Noise Margin (Full Package Temperature Range)  
- 1V at VDD = 5V  
9
B0  
- 2V at VDD = 10V  
- 2.5V at VDD = 15V  
• Meets All Requirements of JEDEC Tentative Standard  
No. 13B, “Standard Specifications for Description of  
‘B’ Series CMOS Devices”  
Functional Diagram  
4
Applications  
WORD A  
• Servo Motor Controls  
• Process Controllers  
A > B  
A > B  
A = B  
A < B  
CASCADING  
A = B  
INPUTS  
A < B  
Description  
CD4063BMS is a 4-bit magnitude comparator designed for use  
in computer and logic applications that require the comparison of  
two 4-bit words. This logic circuit determines whether one 4-bit  
word (Binary or BCD) is “less than”, “equal to”, or “greater than” a  
second 4-bit word.  
4
WORD B  
The CD4063BMS has eight comparing inputs (A3, B3, through  
A0, B0), three outputs (A < B, A = B, A > B) and three cascading  
inputs (A < B, A = B, A > B) that permit systems designers to  
expand the comparator function to 8, 12, 16 . . . 4N bits. When a  
single CD4063BMS is used, the cascading inputs are connected  
as follows: (A < B) = low, (A = B) = high, (A > B) = low.  
For words longer than 4 bits, CD4063BMS devices may be cas-  
caded by connecting the outputs of the less significant compara-  
tor to the corresponding cascading inputs of the more significant  
comparator. Cascading inputs (A < B, A = B, and A > B) on the  
least significant comparator are connected to a low, a high, and a  
low level, respectively.  
The CD4063BMS is supplied in these 16 lead outline pack-  
ages:  
Braze Seal DIP  
Frit Seal DIP  
H4T  
H1E  
Ceramic Flatpack H6W  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 3318  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
7-958  
12345678

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