5秒后页面跳转
CD4052BF PDF预览

CD4052BF

更新时间: 2024-02-21 21:58:34
品牌 Logo 应用领域
哈里斯 - HARRIS 解复用器
页数 文件大小 规格书
15页 146K
描述
CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion

CD4052BF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.67模拟集成电路 - 其他类型:DIFFERENTIAL MULTIPLEXER
标称带宽:25 MHz最大输入电压:20.5 V
最小输入电压:-0.5 VJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
湿度敏感等级:1标称负供电电压 (Vsup):-5 V
正常位置:NC信道数量:4
功能数量:1端子数量:16
标称断态隔离度:40 dB通态电阻匹配规范:15 Ω
最大通态电阻 (Ron):1050 Ω最高工作温度:125 °C
最低工作温度:-55 °C输出:SEPARATE OUTPUT
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5/15 V认证状态:Not Qualified
座面最大高度:1.2 mm最大信号电流:0.01 A
子类别:Multiplexer or Switches最大供电电流 (Isup):3 mA
最大供电电压 (Vsup):20 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
最长断开时间:720 ns最长接通时间:720 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

CD4052BF 数据手册

 浏览型号CD4052BF的Datasheet PDF文件第2页浏览型号CD4052BF的Datasheet PDF文件第3页浏览型号CD4052BF的Datasheet PDF文件第4页浏览型号CD4052BF的Datasheet PDF文件第5页浏览型号CD4052BF的Datasheet PDF文件第6页浏览型号CD4052BF的Datasheet PDF文件第7页 
CD4051B, CD4052B, CD4053B  
Semiconductor  
August 1998  
File Number 902.2  
CMOS Analog Multiplexers/Demultiplexers  
with Logic Level Conversion  
Features  
• Wide Range of Digital and Analog Signal Levels  
- Digital . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V  
The CD4051B, CD4052B, and CD4053B analog multiplexers  
are digitally-controlled analog switches having low ON  
impedance and very low OFF leakage current. Control of  
- Analog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V  
P-P  
• Low ON Resistance, 125(Typ) Over 15V  
Signal Input  
P-P  
analog signals up to 20V  
can be achieved by digital  
Range for V -V = 18V  
P-P  
signal amplitudes of 4.5V to 20V (if V -V  
DD EE  
= 3V, a  
DD SS  
• High OFF Resistance, Channel Leakage of ±100pA (Typ)  
V
-V of up to 13V can be controlled; for V -V  
DD EE  
DD DD  
of at least 4.5V is  
at V -V = 18V  
DD EE  
level differences above 13V, a V -V  
DD DD  
• Logic-Level Conversion for Digital Addressing Signals of  
required). For example, if V  
= +4.5V, V  
= 0V, and  
DD  
DD  
= -13.5V, analog signals from -13.5V to +4.5V can be  
3V to 20V (V -V = 3V to 20V) to Switch Analog  
V
DD SS  
DD  
Signals to 20V  
(V -V = 20V)  
P-P DD EE  
controlled by digital inputs of 0V to 5V. These multiplexer  
circuits dissipate extremely low quiescent power over the  
• Matched Switch Characteristics, r  
ON  
= 5(Typ) for  
full V -V  
DD DD  
and V -V supply-voltage ranges,  
DD DD  
V
-V = 15V  
DD EE  
independent of the logic state of the control signals. When  
a logic “1” is present at the inhibit input terminal, all  
channels are off.  
• Very Low Quiescent Power Dissipation Under All Digital-  
Control Input and Supply Conditions, 0.2µW (Typ) at  
V
-V = V -V = 10V  
DD SS DD EE  
The CD4051B is a single 8-Channel multiplexer having three  
binary control inputs, A, B, and C, and an inhibit input. The  
three binary signals select 1 of 8 channels to be turned on,  
and connect one of the 8 inputs to the output.  
• Binary Address Decoding on Chip  
• 5V, 10V and 15V Parametric Ratings  
• 10% Tested for Quiescent Current at 20V  
The CD4052B is a differential 4-Channel multiplexer having  
two binary control inputs, A and B, and an inhibit input. The  
two binary input signals select 1 of 4 pairs of channels to be  
turned on and connect the analog inputs to the outputs.  
• Maximum Input Current of 1µA at 18V Over Full Package  
Temperature Range, 100nA at 18V and 25 C  
o
• Break-Before-Make Switching Eliminates Channel  
Overlap  
The CD4053B is a triple 2-Channel multiplexer having three  
separate digital control inputs, A, B, and C, and an inhibit  
input. Each control input selects one of a pair of channels  
which are connected in a single-pole, double-throw  
configuration.  
Applications  
• Analog and Digital Multiplexing and Demultiplexing  
• A/D and D/A Conversion  
• Signal Gating  
When these devices are used as demultiplexers, the  
“CHANNEL IN/OUT” terminals are the outputs and the  
“COMMON OUT/IN” terminals are the inputs.  
Ordering Information  
TEMP.  
RANGE ( C)  
PKG.  
NO.  
o
PART NUMBER  
PACKAGE  
CD4051BF, CD4052BF,  
CD4053BF  
-55 to 125 16 Ld CERDIP F16.3  
CD4051BE, CD4052BE,  
CD4053BE  
-55 to 125 16 Ld PDIP  
-55 to 125 16 Ld SOIC  
E16.3  
CD4051BM, CD4052BM,  
CD4053BM  
M16.15  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Copyright © Harris Corporation 1998  
1

与CD4052BF相关器件

型号 品牌 获取价格 描述 数据表
CD4052BF3 ROCHESTER

获取价格

4-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP16, PACKAGE-16
CD4052BF3 RENESAS

获取价格

4-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP16
CD4052BF3A TI

获取价格

CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4052BF3A RENESAS

获取价格

DIFFERENTIAL MULTIPLEXER
CD4052BFMSR RENESAS

获取价格

CD4052BFMSR
CD4052BK3 RENESAS

获取价格

Single-Ended Multiplexer, 1 Func, 4 Channel, CMOS, PDSO16
CD4052BKMS RENESAS

获取价格

Differential Multiplexer, 1 Func, 4 Channel, CMOS, CDFP16
CD4052BKMSR ETC

获取价格

4-Channel Analog Multiplexer
CD4052BM NSC

获取价格

Single 8(4/2)-Channel Analog Multiplexer/Demultiplexer
CD4052BM TI

获取价格

CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion