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CD4052BCSJX PDF预览

CD4052BCSJX

更新时间： 2024-02-19 18:57:11
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 复用器开关复用器或开关信号电路光电二极管
页数 文件大小 规格书
13页 144K
描述
4-Channel Analog Multiplexer

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中文翻译

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CD4052BCSJX 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP16,.25针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：0.67模拟集成电路 - 其他类型：DIFFERENTIAL MULTIPLEXER
标称带宽：25 MHz最大输入电压：20.5 V
最小输入电压：-0.5 VJESD-30 代码：R-PDSO-G16
JESD-609代码：e3长度：5 mm
湿度敏感等级：1标称负供电电压 (Vsup)：-5 V
正常位置：NC信道数量：4
功能数量：1端子数量：16
标称断态隔离度：40 dB通态电阻匹配规范：15 Ω
最大通态电阻 (Ron)：1050 Ω最高工作温度：125 °C
最低工作温度：-55 °C输出：SEPARATE OUTPUT
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：5/15 V认证状态：Not Qualified
座面最大高度：1.2 mm最大信号电流：0.01 A
子类别：Multiplexer or Switches最大供电电流 (Isup)：3 mA
最大供电电压 (Vsup)：20 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
最长断开时间：720 ns最长接通时间：720 ns
切换：BREAK-BEFORE-MAKE技术：CMOS
温度等级：MILITARY端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

CD4052BCSJX 数据手册

 浏览型号CD4052BCSJX的Datasheet PDF文件第2页浏览型号CD4052BCSJX的Datasheet PDF文件第3页浏览型号CD4052BCSJX的Datasheet PDF文件第4页浏览型号CD4052BCSJX的Datasheet PDF文件第5页浏览型号CD4052BCSJX的Datasheet PDF文件第6页浏览型号CD4052BCSJX的Datasheet PDF文件第7页 
November 1983  
Revised August 2000  
CD4051BC • CD4052BC • CD4053BC  
Single 8-Channel Analog Multiplexer/Demultiplexer •  
Dual 4-Channel Analog Multiplexer/Demultiplexer •  
Triple 2-Channel Analog Multiplexer/Demultiplexer  
General Description  
Features  
■ Wide range of digital and analog signal levels:  
The CD4051BC, CD4052BC, and CD4053BC analog mul-  
tiplexers/demultiplexers are digitally controlled analog  
switches having low “ON” impedance and very low “OFF”  
leakage currents. Control of analog signals up to 15Vp-p  
digital 3 – 15V, analog to 15Vp-p  
■ Low “ON” resistance: 80Ω (typ.) over entire 15Vp-p  
signal-input range for VDD − VEE = 15V  
can be achieved by digital signal amplitudes of 3−15V. For  
example, if VDD = 5V, VSS = 0V and VEE = −5V, analog sig-  
■ High “OFF” resistance:  
channel leakage of ±10 pA (typ.) at VDD − VEE = 10V  
nals from −5V to +5V can be controlled by digital inputs of  
0−5V. The multiplexer circuits dissipate extremely low qui-  
escent power over the full VDD−VSS and VDD−VEE supply  
■ Logic level conversion for digital addressing signals of  
3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals  
voltage ranges, independent of the logic state of the control  
signals. When a logical “1” is present at the inhibit input ter-  
minal all channels are “OFF”.  
to 15 Vp-p (VDD − VEE = 15V)  
■ Matched switch characteristics:  
∆RON = 5Ω (typ.) for VDD − VEE = 15V  
CD4051BC is a single 8-channel multiplexer having three  
binary control inputs. A, B, and C, and an inhibit input. The  
three binary signals select 1 of 8 channels to be turned  
“ON” and connect the input to the output.  
■ Very low quiescent power dissipation under all  
digital-control input and supply conditions:  
1 µ W (typ.) at VDD − VSS = VDD − VEE = 10V  
■ Binary address decoding on chip  
CD4052BC is a differential 4-channel multiplexer having  
two binary control inputs, A and B, and an inhibit input. The  
two binary input signals select 1 or 4 pairs of channels to  
be turned on and connect the differential analog inputs to  
the differential outputs.  
CD4053BC is a triple 2-channel multiplexer having three  
separate digital control inputs, A, B, and C, and an inhibit  
input. Each control input selects one of a pair of channels  
which are connected in a single-pole double-throw configu-  
ration.  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4051BCM  
CD4051BCSJ  
CD4051BCMTC  
CD4051BCN  
CD4052BCM  
CD4052BCSJ  
CD4052BCN  
CD4053BCM  
CD4053BCSJ  
CD4053BCN  
M16A  
M16D  
MTC16  
N16E  
M16A  
M16D  
N16E  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
© 2000 Fairchild Semiconductor Corporation  
DS005662  
www.fairchildsemi.com  
1234567...13

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CD4052BCSJX 替代型号

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