CD4051BM

更新时间： 2024-02-09 06:24:35

品牌	Logo	应用领域
德州仪器 - TI		解复用器开关复用器或开关信号电路光电二极管
页数	文件大小	规格书
20页	428K
描述
CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion

阅读下载

中文翻译

获取价格

技术参数
数据手册
替代型号

如果您发现信息不准确，欢迎纠错

CD4051BM 技术参数

生命周期：	Transferred	包装说明：	QFP, QFP20,.45SQ
Reach Compliance Code：	compliant	风险等级：	5.79
模拟集成电路 - 其他类型：	SINGLE-ENDED MULTIPLEXER	JESD-30 代码：	S-PQFP-G20
信道数量：	8	功能数量：	1
端子数量：	20	最大通态电阻 (Ron)：	1200 Ω
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP20,.45SQ	封装形状：	SQUARE
封装形式：	FLATPACK	电源：	5/15 V
认证状态：	Not Qualified	最大信号电流：	0.01 A
子类别：	Multiplexer or Switches	最大供电电流 (Isup)：	50 mA
表面贴装：	YES	最长接通时间：	720 ns
切换：	BREAK-BEFORE-MAKE	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	QUAD
Base Number Matches：	1

CD4051BM 数据手册

CD4051B, CD4052B, CD4053B

Data sheet acquired from Harris Semiconductor

SCHS047G

August 1998 - Revised October 2003

The CD4051B is a single 8-Channel multiplexer having three

binary control inputs, A, B, and C, and an inhibit input. The

three binary signals select 1 of 8 channels to be turned on,

and connect one of the 8 inputs to the output.

Features

• Wide Range of Digital and Analog Signal Levels

- Digital . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V

- Analog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20V

P-P

The CD4052B is a differential 4-Channel multiplexer having

two binary control inputs, A and B, and an inhibit input. The

two binary input signals select 1 of 4 pairs of channels to be

turned on and connect the analog inputs to the outputs.

• Low ON Resistance, 125Ω (Typ) Over 15V

Range for V -V = 18V

Signal Input

[ /Title

(CD405

1B,

CD4052

CD4053

/Sub-

P-P

DD EE

• High OFF Resistance, Channel Leakage of ±100pA (Typ)

at V -V = 18V

DD EE

The CD4053B is a triple 2-Channel multiplexer having three

separate digital control inputs, A, B, and C, and an inhibit

input. Each control input selects one of a pair of channels

which are connected in a single-pole, double-throw

conﬁguration.

• Logic-Level Conversion for Digital Addressing Signals of

3V to 20V (V -V = 3V to 20V) to Switch Analog

DD SS

Signals to 20V

(V -V = 20V)

P-P DD EE

• Matched Switch Characteristics, r

= 5Ω (Typ) for

-V = 15V

DD EE

When these devices are used as demultiplexers, the

“CHANNEL IN/OUT” terminals are the outputs and the

“COMMON OUT/IN” terminals are the inputs.

ject

• Very Low Quiescent Power Dissipation Under All Digital-

Control Input and Supply Conditions, 0.2µW (Typ) at

(CMOS

Analog

Multi-

plex-

ers/Dem

ultiplex-

ers with

Logic

Level

Conver-

sion)

-V = V -V = 10V

DD SS DD EE

Ordering Information

• Binary Address Decoding on Chip

TEMP. RANGE

• 5V, 10V, and 15V Parametric Ratings

PART NUMBER

( C)

PACKAGE

• 100% Tested for Quiescent Current at 20V

CD4051BF3A, CD4052BF3A,

CD4053BF3A

-55 to 125

16 Ld CERAMIC

DIP

• Maximum Input Current of 1µA at 18V Over Full Package

Temperature Range, 100nA at 18V and 25 C

CD4051BE, CD4052BE,

CD4053BE

-55 to 125

16 Ld PDIP

• Break-Before-Make Switching Eliminates Channel

Overlap

CD4051BM, CD4051BMT,

CD4051BM96

16 Ld SOIC

CD4052BM, CD4052BMT,

CD4052BM96

CD4053BM, CD4053BMT,

CD4053BM96

Applications

/Author

()

• Analog and Digital Multiplexing and Demultiplexing

• A/D and D/A Conversion

• Signal Gating

/Key-

words

(Harris

Semi-

conduc-

tor,

CD4051BNSR, CD4052BNSR,

CD4053BNSR

-55 to 125

16 Ld SOP

CD4051BPW, CD4051BPWR,

CD4052BPW, CD4052BPWR

CD4053BPW, CD4053BPWR

16 Ld TSSOP

CMOS Analog Multiplexers/Demultiplexers

with Logic Level Conversion

NOTE: When ordering, use the entire part number. The sufﬁxes 96

and R denote tape and reel. The sufﬁx T denotes a small-quantity

reel of 250.

The CD4051B, CD4052B, and CD4053B analog multiplexers

CD4000 are digitally-controlled analog switches having low ON

impedance and very low OFF leakage current. Control of

analog signals up to 20V

can be achieved by digital

P-P

signal amplitudes of 4.5V to 20V (if V -V

= 3V, a

DD SS

-V of up to 13V can be controlled; for V -V level

DD EE DD EE

differences above 13V, a V -V

of at least 4.5V is

DD SS

required). For example, if V = +4.5V, V

= 0V, and

= -13.5V, analog signals from -13.5V to +4.5V can be

controlled by digital inputs of 0V to 5V. These multiplexer

circuits dissipate extremely low quiescent power over the

full V -V

DD SS

and V -V supply-voltage ranges,

DD EE

independent of the logic state of the control signals. When

a logic “1” is present at the inhibit input terminal, all

channels are off.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

12 3 4 5 6 7...20

中文翻译

下载PDF

CD4051BM 替代型号

型号	品牌	替代类型	描述	数据表
CD4051BMG4	TI	完全替代	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD74HCT4051M96	TI	类似代替	High-Speed CMOS Logic Analog Multiplexers/Demultiplexers
CD74HCT4051M	TI	类似代替	High Speed CMOS Logic Analog Multiplexers/Demultiplexers

与CD4051BM相关器件

型号	品牌	获取价格	描述	数据表
CD4051BM/883	ETC	获取价格	8-Channel Analog Multiplexer
CD4051BM96	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4051BM96	RENESAS	获取价格	8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
CD4051BM96E4	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4051BM96G3	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4051BM96G4	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4051BME4	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4051BMG4	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4051B-MIL	TI	获取价格	具有逻辑电平转换功能的 CMOS 单路 8 通道模拟多路复用器/多路信号分离器
CD4051BMJ	NSC	获取价格	Single 8-Channel, Dual 4-Channel, Triple 2-Channel Analog Multiplexer/Demultiplexe

产品中心

服务支持

精选活动

关于我们

帮助中心

CD4051BM

CD4051BM 技术参数

CD4051BM 数据手册

CD4051BM 替代型号

与CD4051BM相关器件

与CD4051BM相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CD4051BM

CD4051BM 技术参数

CD4051BM 数据手册

CD4051BM 替代型号

与CD4051BM相关器件

与CD4051BM相关文章

您还可以找

您在本页遇到什么问题？