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CD4022BCMX

更新时间： 2024-01-03 22:58:24
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器
页数 文件大小 规格书
7页 79K
描述
Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs

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CD4022BCMX 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP16,.3Reach Compliance Code：unknown
风险等级：5.92计数方向：UP
JESD-30 代码：R-XDIP-T16JESD-609代码：e0
负载电容（CL）：15 pF负载/预设输入：NO
逻辑集成电路类型：DIVIDE BY 8 COUNTER最大频率@ Nom-Sup：1000000 Hz
最大I（ol）：0.00002 A工作模式：SYNCHRONOUS
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC封装代码：DIP
封装等效代码：DIP16,.3封装形状：RECTANGULAR
封装形式：IN-LINE电源：5/15 V
认证状态：Not Qualified子类别：Counters
表面贴装：NO技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUALBase Number Matches：1

CD4022BCMX 数据手册

 浏览型号CD4022BCMX的Datasheet PDF文件第2页浏览型号CD4022BCMX的Datasheet PDF文件第3页浏览型号CD4022BCMX的Datasheet PDF文件第4页浏览型号CD4022BCMX的Datasheet PDF文件第5页浏览型号CD4022BCMX的Datasheet PDF文件第6页浏览型号CD4022BCMX的Datasheet PDF文件第7页 
October 1987  
Revised January 1999  
CD4017BC • CD4022BC  
Decade Counter/Divider with 10 Decoded Outputs •  
Divide-by-8 Counter/Divider with 8 Decoded Outputs  
General Description  
The CD4017BC is a 5-stage divide-by-10 Johnson counter  
Features  
■ Wide supply voltage range: 3.0V to 15V  
with 10 decoded outputs and a carry out bit.  
■ High noise immunity: 0.45 VDD (typ.)  
The CD4022BC is a 4-stage divide-by-8 Johnson counter  
with 8 decoded outputs and a carry-out bit.  
■ Low power Fan out of 2 driving 74L  
TTL compatibility: or 1 driving 74LS  
■ Medium speed operation: 5.0 MHz (typ.)  
with 10V VDD  
These counters are cleared to their zero count by a logical  
“1” on their reset line. These counters are advanced on the  
positive edge of the clock signal when the clock enable sig-  
nal is in the logical “0” state.  
■ Low power: 10 µW (typ.)  
■ Fully static operation  
The configuration of the CD4017BC and CD4022BC per-  
mits medium speed operation and assures a hazard free  
counting sequence. The 10/8 decoded outputs are nor-  
mally in the logical “0” state and go to the logical “1” state  
only at their respective time slot. Each decoded output  
remains high for 1 full clock cycle. The carry-out signal  
completes a full cycle for every 10/8 clock input cycles and  
is used as a ripple carry signal to any succeeding stages.  
Applications  
•
•
•
•
•
•
Automotive  
Instrumentation  
Medical electronics  
Alarm systems  
Industrial electronics  
Remote metering  
Ordering Code:  
Order Number  
CD4017BCM  
CD4017BCSJ  
CD4017BCN  
CD4022BCM  
CD4022BCN  
Package Number  
M16A  
Package Description  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M16D  
N16E  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
M16A  
N16E  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignments for DIP, SOIC and SOP  
CD4017B  
Pin Assignments for DIP and SOIC  
CD4022B  
Top View  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005950.prf  
www.fairchildsemi.com  
1234567

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