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CD4010C PDF预览

CD4010C

更新时间: 2024-10-01 22:56:43
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飞兆/仙童 - FAIRCHILD /
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5页 56K
描述
Hex Buffers (Non-Inverting)

CD4010C 数据手册

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October 1987  
Revised June 2000  
CD4010C  
Hex Buffers (Non-Inverting)  
General Description  
Features  
The CD4010C hex buffers are monolithic complementary  
MOS (CMOS) integrated circuits. The N- and P-channel  
enhancement mode transistors provide a symmetrical cir-  
cuit with output swings essentially equal to the supply volt-  
age. This results in high noise immunity over a wide supply  
voltage range. No DC power other than that caused by  
leakage current is consumed during static conditions. All  
inputs are protected against static discharge. These gates  
may be used as hex buffers, CMOS to DTL or TTL inter-  
face or as CMOS current drivers. Conversion ranges are  
from 3V to 15V providing VCC VDD. The devices also  
Wide supply voltage range: 3.0V to 15V  
Low power: 100 nW (typ.)  
High noise immunity: 0.45 VDD (typ.)  
High current sinking: 8 mA (min.) at VO = 0.5V  
capability: and VDD = 10V  
Applications  
Automotive  
Data terminals  
Instrumentation  
Medical electronics  
Alarm system  
have buffered outputs which improve transfer characteris-  
tics by providing very high gain.  
Industrial controls  
Remote metering  
Computers  
Ordering Code:  
Order Number  
CD4010CM  
Package Number  
M16A  
Package Description  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
CD4010CN  
N16E  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Connection Diagram  
Schematic Diagram  
Pin Assignments for DIP and SOIC  
Hex COS/MOS to DTL or TTL  
converter (inverting).  
Connect VCC to DTL or TTL supply.  
Connect VDD to COS/MOS supply.  
Top View  
© 2000 Fairchild Semiconductor Corporation  
DS005945  
www.fairchildsemi.com  

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