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CD4010BFMSR PDF预览

CD4010BFMSR

更新时间: 2024-11-04 14:49:59
品牌 Logo 应用领域
瑞萨 - RENESAS 输入元件逻辑集成电路触发器
页数 文件大小 规格书
8页 80K
描述
4000/14000/40000 SERIES, HEX 1-INPUT NON-INVERT GATE, CDIP16, FRIT SEALED, DIP-16

CD4010BFMSR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.33
系列:4000/14000/40000JESD-30 代码:R-GDIP-T16
JESD-609代码:e0长度:19.05 mm
负载电容(CL):50 pF逻辑集成电路类型:BUFFER
最大I(ol):0.00036 A功能数量:6
输入次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 VProp。Delay @ Nom-Sup:270 ns
传播延迟(tpd):270 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:MIL-PRF-38535 Class V
座面最大高度:0.8 mm子类别:Gates
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED总剂量:100k Rad(Si) V
宽度:7.62 mmBase Number Matches:1

CD4010BFMSR 数据手册

 浏览型号CD4010BFMSR的Datasheet PDF文件第2页浏览型号CD4010BFMSR的Datasheet PDF文件第3页浏览型号CD4010BFMSR的Datasheet PDF文件第4页浏览型号CD4010BFMSR的Datasheet PDF文件第5页浏览型号CD4010BFMSR的Datasheet PDF文件第6页浏览型号CD4010BFMSR的Datasheet PDF文件第7页 
CD4010BMS  
November 1994  
File Number 3078  
CMOS Hex Buffer/Converter  
Features  
• Non-Inverting Type  
CD4010BMS Hex Buffer/Converter may be used as CMOS  
to TTL or DTL logic-level converter or CMOS high-sink-cur-  
rent driver.  
• High-Voltage Type (20V Rating)  
• 100% Tested for Quiescent Current at 20V  
The CD4050B is the preferred hex buffer replacement for the  
CD4010BMS in all applications except multiplexers.The  
CD4010BMS is supplied in these 16 lead outline packages:  
• Maximum Input Current of 1µA at 18V Over Full  
Package-Temperature Range;  
o
- 100nA at 18V and +25 C  
Braze Seal DIP  
Frit Seal DIP  
H4S  
H1E  
• 5V, 10V and 15V Parametric Ratings  
Ceramic Flatpack H6W  
Applications  
• CMOS To DTL/TTL Hex Converter  
• CMOS Current “Sink” or “Source” Driver  
• CMOS High-to-Low Logic-Level Converter  
• Multiplexer - 1 to 6 or 6 to 1  
Pinout  
Functional Diagram  
CD4010BMS  
TOP VIEW  
3
2
A
B
C
D
E
F
G = A  
H = B  
I = C  
VCC  
G = A  
A
1
2
3
4
5
6
7
8
16 VDD  
15 L = F  
14 F  
5
4
H = B  
B
13 NC  
12 K = E  
11 E  
7
6
I = C  
C
9
10  
12  
15  
J = D  
K = E  
L = F  
10 J = D  
13  
1
NC  
VCC  
VSS  
VDD  
9
D
VSS  
11  
14  
NC = NO CONNECTION  
8
16  
NC = NO CONNECTION  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
4-1  

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