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CBTL06DP211EE PDF预览

CBTL06DP211EE

更新时间： 2024-11-16 09:16:19
品牌 Logo 应用领域
恩智浦 - NXP 解复用器逻辑集成电路
页数 文件大小 规格书
18页 145K
描述
DisplayPort Gen1 2 : 1 multiplexer

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中文翻译

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CBTL06DP211EE 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：BGA包装说明：TFBGA,
针数：48Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.8
Is Samacsys：N系列：CBT/FST/QS/5C/B
JESD-30 代码：S-PBGA-B48长度：5 mm
逻辑集成电路类型：MULTIPLEXER湿度敏感等级：1
功能数量：1输入次数：2
输出次数：1端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：TFBGA封装形状：SQUARE
封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.15 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：5 mm
Base Number Matches：1

CBTL06DP211EE 数据手册

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CBTL06DP211  
DisplayPort Gen1 2 : 1 multiplexer  
Rev. 1 — 21 February 2011  
Product data sheet  
1. General description  
CBTL06DP211 is a multi-channel high-speed multiplexer meant for DisplayPort (DP)  
v1.1a or Embedded DisplayPort applications operating at data rate of 1.62 Gbit/s or  
2.7 Gbit/s. It is designed using NXP proprietary high-bandwidth pass-gate technology and  
it can be used for 1 : 2 switching or 2 : 1 multiplexing of four high-speed differential  
AC-coupled DP channels. Further, it is capable of switching/multiplexing of Hot Plug  
Detect (HPD) signal as well as Auxiliary (AUX) and Display Data Channel (DDC) signals.  
In order to support GPUs/CPUs that have dedicated AUX and DDC I/Os, CBTL06DP211  
provides an additional level of multiplexing of AUX and DDC signals delivering true  
flexibility and choice.  
CBTL06DP211 consumes very low current in operational mode (less than 1 mA typical)  
and provides for a shutdown function (ultra low current consumption less than 10 μA) to  
support power-sensitive or battery-powered applications. It is designed for delivering  
optimum performance at DP data rates of 1.62 Gbit/s and 2.7 Gbit/s.  
A typical application of CBTL06DP211 is on motherboards where one of two GPU display  
sources needs to be selected to connect to a display sink device or connector. A controller  
chip selects which path to use by setting a select signal HIGH or LOW. Due to the  
non-directional nature of the signal paths (which use high-bandwidth pass-gate  
technology), the CBTL06DP211 can also be used in the reverse topology, e.g., to connect  
one display source device to one of two display sink devices or connectors.  
Optionally, the CBTL06DP211 can be used in conjunction with an HDMI/DVI level shifter  
device (PTN3360A/B or PTN3360D) to allow for DisplayPort as well as HDMI/DVI  
connectivity.  
2. Features and benefits  
„ 1 : 2 switching or 2 : 1 multiplexing of DisplayPort (v1.1a - 1.62 Gbit/s or 2.7 Gbit/s)  
‹ 4 high-speed differential channels with 2 : 1 multiplexing/switching for DisplayPort  
signals  
‹ 1 channel with 4 : 1 multiplexing/switching for AUX differential signals and DDC  
single-ended clock and data signals  
‹ 1 channel with 2 : 1 multiplexing/switching for single-ended HPD signals  
„ High-bandwidth analog pass-gate technology  
„ Very low lane intra-pair skew (5 ps typical)  
„ Very low inter-pair skew (< 180 ps)  
„ Switch/multiplexer position select CMOS input  
„ Shutdown mode CMOS input  
„ Shutdown mode delivers ultra low power consumption  
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