Datasheet > CBM9001A-48AG

CBM9001A-48AG

更新时间： 2024-10-15 17:15:27

品牌	Logo	应用领域
芯佰微 - COREBAI		控制器
页数	文件大小	规格书
29页	986K
描述
USB 1.1 控制器

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CBM9001A-48AG 数据手册

Embedded USB Host/Slave Controller

CBM9001A Datasheet

Features

Functional Description

■

First USB Host/Slave controller for embedded systems in the

market with a standard microprocessor bus interface

The CBM9001A is an Embedded USB Host/Slave Controller

capable of communicating in either full speed or low speed. The

CBM9001A interfaces to devices such as microprocessors,

micro- controllers, DSPs, or directly to a variety of buses such

as ISA, PCMCIA, and others. The CBM9001A USB Host

Controller conforms to USB Specification 1.1.

■

Supports both full speed (12 Mbps) and low speed (1.5 Mbps)

USB transfer in both master and slave modes

■

Conforms to USB Specification 1.1 for full- and lowspeed

Operates as a single USB host or slave under software control

Automatic detection of either low- or full-speed devices

8-bitbidirectional data, portI/O(DMAsupportedinslavemode)

On-chip SIE and USB transceivers

The CBM9001A incorporates USB Serial Interface functionality

along with internal full or low speed transceivers. The

CBM9001A supports and operates in USB full speed mode at 12

Mbps, or in low-speed mode at 1.5 Mbps. When in host mode,

the CBM9001A is the master and controls the USB bus and the

devices that are connected to it. In peripheral mode, otherwise

known as a slave device, the CBM9001A operates as a variety

of full- or low-speed devices.

On-chip single root HUB support

256-byte internal SRAM buffer

The CBM9001A data port and microprocessor interface provide

an 8-bit data path I/O or DMA bidirectional, with interrupt

support to allow easy interface to standard microprocessors or

microcontrollers such as Motorola or Intel CPUs and many

others. The CBM9001A has 256 bytes of internal RAM, which

is used for control registers and data buffers.

Ping-pong buffers for improved performance

Operates from 12 or 48 MHz crystal or oscillator (built-in DPLL)

5 V-tolerant interface

Suspend/resume, wake up, and low-power modesare

supported

The available Pb-free package is a 48-pin (CBM9001A)

package. All packages operate at 3.3 VDC. The I/O interface

logic is 5 V-tolerant.

■

Auto-generation of SOF and CRC5/16

Auto-address increment mode, saves memory READ/WRITE

cycles

■

Development kit including source code drivers isavailable

3.3-V power source, 0.35 micron CMOS technology

Available in 48-pin TQFP package

Logic Block Diagram

Master/Slave

Controller

INTERRUPT

INTR

CONTROLLER

256 Byte RAM

SERIAL

INTERFACE

ENGINE

USB

BUFFERS

nDRQ

Root HUB

XCVRS

D-

DMA

CONTROL

Interface

REGISTERS

nDACK

nWR

nRD

nCS

PROCESSOR

INTERFACE

CLOCK

GENERATOR

nRST

D0-7

www.corebai. com

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与CBM9001A-48AG相关器件

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CBM9002A-56BCG	COREBAI	获取价格	Industry-standard enhanced 8051 core
CBM9002A-56IBG	COREBAI	获取价格	Industry-standard enhanced 8051 core
CBM9002A-56ILG	COREBAI	获取价格	Industry-standard enhanced 8051 core
CBM9002A-56ISG	COREBAI	获取价格	Industry-standard enhanced 8051 core
CBM9002A-56LCG	COREBAI	获取价格	Industry-standard enhanced 8051 core
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