CAV24C64
64-Kb I2C CMOS Serial
EEPROM
Description
The CAV24C64 is a 64−Kb CMOS Serial EEPROM device,
internally organized as 8192 words of 8 bits each.
http://onsemi.com
It features a 32−byte page write buffer and supports the Standard
2
(100 kHz) and Fast (400 kHz) I C protocol.
External address pins make it possible to address up to eight
CAV24C64 devices on the same bus.
SOIC−8
W SUFFIX
TSSOP−8
Y SUFFIX
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
CASE 751BD
CASE 948AL
2
• Supports Standard and Fast I C Protocol
• 2.5 V to 5.5 V Supply Voltage Range
• 32−Byte Page Write Buffer
PIN CONFIGURATION
1
A
A
A
V
0
1
2
CC
• Hardware Write Protection for Entire Memory
• CAV Prefix for Automotive and Other Applications Requiring Site
and Change Control
WP
SCL
SDA
2
• Schmitt Triggers and Noise Suppression Filters on I C Bus Inputs
V
SS
(SCL and SDA)
SOIC (W), TSSOP (Y)
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
For the location of Pin 1, please consult the
corresponding package drawing.
• SOIC, TSSOP 8−lead Packages
• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
PIN FUNCTION
Pin Name
Function
Device Address Input
Serial Data Input/Output
Serial Clock Input
Write Protect Input
Power Supply
A , A , A
0
1
2
V
CC
SDA
SCL
WP
SCL
V
CC
CAV24C64
SDA
A , A , A
2
1
0
V
Ground
SS
WP
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
V
SS
Figure 1. Functional Symbol
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
March, 2011 − Rev. 0
CAV24C64/D