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CAUC1G125MDCKREP PDF预览

CAUC1G125MDCKREP

更新时间： 2024-11-26 12:50:43
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
9页 208K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

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中文翻译

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CAUC1G125MDCKREP 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：TSSOP, TSSOP5/6,.08针数：5
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：1.44
控制类型：ENABLE LOW系列：AUC
JESD-30 代码：R-PDSO-G5JESD-609代码：e4
长度：2 mm负载电容（CL）：30 pF
逻辑集成电路类型：BUFFER最大I（ol）：0.009 A
湿度敏感等级：1位数：1
功能数量：1输入次数：1
端子数量：5最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP5/6,.08
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：0.8/2.7 V最大电源电流（ICC）：0.01 mA
Prop。Delay @ Nom-Sup：7.5 ns传播延迟（tpd）：7.5 ns
认证状态：Not Qualified施密特触发器：NO
座面最大高度：1.1 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：2.7 V最小供电电压 (Vsup)：0.8 V
标称供电电压 (Vsup)：1.2 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：1.25 mm
Base Number Matches：1

CAUC1G125MDCKREP 数据手册

 浏览型号CAUC1G125MDCKREP的Datasheet PDF文件第2页浏览型号CAUC1G125MDCKREP的Datasheet PDF文件第3页浏览型号CAUC1G125MDCKREP的Datasheet PDF文件第4页浏览型号CAUC1G125MDCKREP的Datasheet PDF文件第5页浏览型号CAUC1G125MDCKREP的Datasheet PDF文件第6页浏览型号CAUC1G125MDCKREP的Datasheet PDF文件第7页 
SN74AUC1G125-EP  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
www.ti.com  
SCES670–MARCH 2007  
FEATURES  
•
Controlled Baseline  
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
–
–
One Assembly Site  
One Test Site  
•
•
•
•
•
Sub-1-V Operable  
Max tpd of 2.5 ns at 1.8 V  
Low Power Consumption, 10-µA Max ICC  
±8-mA Output Drive at 1.8 V  
One Fabrication Site  
•
•
Extended Temperature Performance of –55°C  
to 125°C  
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
•
Enhanced Product-Change Notification  
•
ESD Protection Exceeds JESD 22  
(1)  
Qualification Pedigree  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
1000-V Charged-Device Model (C101)  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DCK PACKAGE  
(TOP VIEW)  
VCC  
OE  
A
1
2
3
5
4
GND  
Y
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
The SN74AUC1G125 is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC  
operation.  
The SN74AUC1G125 is a single-line driver with a 3-state output. The output is disabled when the output-enable  
(OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...9

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CAUC1G125MDCKREP 替代型号

型号 品牌 替代类型 描述 数据表
V62/06656-01XE TI

完全替代

 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

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