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CAT5401WI-50 PDF预览

CAT5401WI-50

更新时间: 2024-11-02 06:46:15
品牌 Logo 应用领域
安森美 - ONSEMI 转换器数字电位计电阻器光电二极管
页数 文件大小 规格书
15页 213K
描述
Quad Digitally Programmable Potentiometers with 64 Taps and SPI Interface

CAT5401WI-50 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:24
Reach Compliance Code:compliant风险等级:5.11
Is Samacsys:N其他特性:NONVOLATILE MEMORY
控制接口:3-WIRE SERIAL转换器类型:DIGITAL POTENTIOMETER
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:15.3 mm湿度敏感等级:1
功能数量:4位置数:64
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified电阻定律:LINEAR
最大电阻容差:20%最大电阻器端电压:6 V
最小电阻器端电压:座面最大高度:2.65 mm
标称供电电压:5 V表面贴装:YES
标称温度系数:300 ppm/ °C温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40标称总电阻:50000 Ω
宽度:7.47 mmBase Number Matches:1

CAT5401WI-50 数据手册

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CAT5401  
Quad Digitally Programmable Potentiometers  
(DPP™) with 64 Taps and SPI Interface  
FEATURES  
DESCRIPTION  
„ Four linear taper digitally programmable  
The CAT5401 is four Digitally Programmable  
Potentiometers (DPPs™) integrated with control logic  
and 16 bytes of NVRAM memory. Each DPP consists  
of a series of 63 resistive elements connected  
between two externally accessible end points. The tap  
points between each resistive element are connected  
to the wiper outputs with CMOS switches. A separate  
6-bit control register (WCR) independently controls  
the wiper tap switches for each DPP. Associated with  
each wiper control register are four 6-bit non-volatile  
memory data registers (DR) used for storing up to four  
wiper settings. Writing to the wiper control register or  
any of the non-volatile data registers is via a SPI serial  
bus. On power-up, the contents of the first data  
register (DR0) for each of the four potentiometers is  
automatically loaded into its respective wiper control  
register.  
potentiometers  
„ 64 resistor taps per potentiometer  
„ End to end resistance 2.5k, 10k, 50kor  
100kΩ  
„ Potentiometer control and memory access via  
SPI interface: Mode (0, 0) and (1, 1)  
„ Low wiper resistance, typically 100Ω  
„ Nonvolatile memory storage for up to four  
wiper settings for each potentiometer  
„ Automatic recall of saved wiper settings at  
power up  
„ 2.5 to 6.0 volt operation  
„ Standby current less than 1µA  
„ 1,000,000 nonvolatile WRITE cycles  
„ 100 year nonvolatile memory data retention  
„ 24-lead SOIC and 24-lead TSSOP  
„ Industrial temperature range  
The CAT5401 can be used as a potentiometer or as a  
two terminal, variable resistor. It is intended for circuit  
level or system level adjustments in a wide variety of  
applications.  
For Ordering Information details, see page 14.  
PIN CONFIGURATION  
FUNCTIONAL DIAGRAM  
SOIC Package (W)  
TSSOP Package (Y)  
R
R
R
H2  
R
H3  
H0  
H1  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
NC  
R
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
WP  
CS  
R
1
1
V
SI  
CC  
CS  
SCK  
SI  
R
2
A
2
L3  
L0  
1
SPI BUS  
INTERFACE  
WIPER CONTROL  
REGISTERS  
R
R
R
R
W0  
W1  
W2  
W3  
R
H3  
R
3
R
R
3
W0  
H0  
L1  
SO  
R
W3  
R
H0  
R
W0  
CS  
4
4
H1  
A
0
R
L0  
5
R
5
W1  
SO  
V
CC  
NC  
WP  
SI  
6
GND  
6
WP  
NONVOLATILE  
DATA  
REGISTERS  
CAT  
5401  
CAT  
5401  
A
CONTROL LOGIC  
0
HOLD  
SCK  
7
NC  
7
A
1
R
A
1
8
R
8
L3  
W2  
R
L2  
R
H3  
R
9
R
9
L1  
H2  
R
H2  
R
W3  
R
10  
11  
12  
R
10  
11  
12  
R
R
R
L2  
R
L3  
H1  
L2  
L0  
L1  
R
W2  
A
0
SO  
R
W1  
SCK  
NC  
GND  
HOLD  
© 2008 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
1
Doc. No. MD-2012 Rev. I  

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