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CAT5261JI-00-TE13

更新时间： 2024-11-29 15:29:11
品牌 Logo 应用领域
CATALYST 光电二极管转换器电阻器
页数 文件大小 规格书
15页 95K
描述
Digital Potentiometer, 2 Func, 100000ohm, 3-wire Serial Control Interface, 256 Positions, PDSO24, 0.300 INCH, SOIC-24

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CAT5261JI-00-TE13 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：SOIC包装说明：SOP, SOP24,.4
针数：24Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.22控制接口：3-WIRE SERIAL
转换器类型：DIGITAL POTENTIOMETERJESD-30 代码：R-PDSO-G24
JESD-609代码：e0长度：15.4 mm
湿度敏感等级：1功能数量：2
位置数：256端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP24,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：240
电源：3/5 V认证状态：Not Qualified
电阻定律：LINEAR最大电阻容差：20%
最大电阻器端电压：6 V最小电阻器端电压：
座面最大高度：2.65 mm子类别：Digital Potentiometers
标称供电电压：3 V表面贴装：YES
标称温度系数：300 ppm/ °C温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30标称总电阻：100000 Ω
宽度：7.5 mmBase Number Matches：1

CAT5261JI-00-TE13 数据手册

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E
CAT5261  
Dual Digitally Programmable Potentiometer (DPP™) with  
256 Taps and SPI Interface  
TM  
FEATURES  
■ Automatic recall of saved wiper settings at  
■ Two linear-taper digitally programmable  
power up  
potentiometers  
■ 2.5 to 6.0 volt operation  
■ 256 resistor taps per potentiometer  
■ End to end resistance 50kΩ or 100kΩ  
■ Standby current less than 1µA  
■ 1,000,000 nonvolatile WRITE cycles  
■ 100 year nonvolatile memory data retention  
■ 24-lead SOIC and 24-lead TSSOP  
■ Industrial temperature range  
■ Potentiometer control and memory access via  
SPI interface  
■ Low wiper resistance, typically 100Ω  
■ Nonvolatile memory storage for up to four wiper  
settings for each potentiometer  
DESCRIPTION  
registers is via a SPI serial bus. On power-up, the  
contents of the first data register (DR0) for each of the  
potentiometersisautomaticallyloadedintoitsrespective  
wiper control register.  
The CAT5261 is two Digitally Programmable  
Potentiometers (DPPs™) integrated with control logic  
and 8 bytes of NVRAM memory. Each DPP consists of  
a series of resistive elements connected between two  
externallyaccessibleendpoints.Thetappointsbetween  
eachresistiveelementareconnectedtothewiperoutputs  
with CMOS switches. A separate 8-bit control register  
(WCR)independentlycontrolsthewipertapswitchesfor  
each DPP. Associated with each wiper control register  
are four 8-bit non-volatile memory data registers (DR)  
used for storing up to four wiper settings. Writing to the  
wiper control register or any of the non-volatile data  
The CAT5261 can be used as a potentiometer or as a  
two terminal, variable resistor. It is intended for circuit  
level or system level adjustments in a wide variety of  
applications. Itisavailableinthe-40°Cto85°Cindustrial  
operating temperature range and offered in a 24-lead  
SOIC and TSSOP package.  
PIN CONFIGURATION  
FUNCTIONAL DIAGRAM  
R
R
H1  
H0  
SOIC/TSSOP Package (J, W/U, Y)  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
HOLD  
SCK  
NC  
SO  
A0  
1
2
CS  
SCK  
SI  
WIPER  
CONTROL  
REGISTERS  
NC  
NC  
NC  
NC  
3
SPI BUS  
INTERFACE  
4
NC  
SO  
5
NC  
NC  
R
R
W0  
W1  
6
CAT  
5261  
V
7
GND  
CC  
R
R
8
W1  
L0  
WP  
A0  
A1  
NONVOLATILE  
DATA  
REGISTERS  
CONTROL  
LOGIC  
R
R
R
9
H1  
H0  
R
10  
11  
12  
L1  
W0  
HOLD  
A1  
SI  
CS  
WP  
R
R
L1  
L0  
© 2004 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Document No. 2122, Rev. C  
1
1234567...15

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