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CAT35C704PTE13 PDF预览

CAT35C704PTE13

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
CATALYST 可编程只读存储器
页数 文件大小 规格书
14页 88K
描述
4K-Bit Secure Access Serial E2PROM

CAT35C704PTE13 数据手册

 浏览型号CAT35C704PTE13的Datasheet PDF文件第2页浏览型号CAT35C704PTE13的Datasheet PDF文件第3页浏览型号CAT35C704PTE13的Datasheet PDF文件第4页浏览型号CAT35C704PTE13的Datasheet PDF文件第5页浏览型号CAT35C704PTE13的Datasheet PDF文件第6页浏览型号CAT35C704PTE13的Datasheet PDF文件第7页 
Preliminary  
CAT35C704  
4K-Bit Secure Access Serial E2PROM  
FEATURES  
Operating Frequency: DC–3MHz  
Single 5V Supply  
Low Power Consumption:  
–Active: 3 mA  
Password READ/WRITE Protection: 1 to 8 Bytes  
Memory Pointer WRITE Protection  
Sequential READ Operation  
–Standby: 250 µA  
100,000 Program/Erase Cycles  
100 Year Data Retention  
256 x16 or 512 x 8 Selectable Serial Memory  
High Speed Synchronous Protocol  
Commercial, Industrial and Automotive  
Temperature Ranges  
DESCRIPTION  
The CAT35C704 is a 4K-bit Serial E2PROM that safe-  
guards stored data from unauthorized access by use of  
a user selectable (1 to 8 byte) access code and a  
movablememorypointer. Twooperatingmodesprovide  
unprotected and password-protected operation allow-  
ing the user to configure the device as anything from a  
ROM to a fully protected no-access memory. The  
CAT35C704 uses a unique serial-byte synchronous  
communication protocol and has a Sequential Read  
feature where data can be sequentially clocked out of  
the memory array. The device is available in 8-pin DIP  
or 16-pin SOIC packages.  
PIN CONFIGURATION  
BLOCK DIAGRAM  
DIP Package (P)  
SOIC Package (J)  
V
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
CS  
CLK  
DI  
V
NC  
NC  
CS  
CLK  
DI  
NC  
NC  
V
CC  
GND  
PE  
64-BIT ACCESS CODE  
ERR  
GND  
&
CC  
CONTROL BLOCK  
DO  
PE  
DO  
ERR  
GND  
NC  
SERIAL  
CLK  
COMMUNI-  
CATION  
BLOCK  
DO  
NC  
NC  
PE  
CS  
DI  
4K-BIT EEPROM  
ARRAY  
NC  
R/W  
ADDRESS  
5074 FHD F01  
BUFFER  
DECODER  
PIN FUNCTIONS  
INSTRUCTION  
REGISTER  
Pin Name  
Function  
INSTRUCTION  
DECODER  
ADDRESS  
REGISTER  
CS  
Chip Select  
ERR  
DO(1)  
CLK  
DI(1)  
PE  
Serial Data Output  
Clock Input  
STATUS  
REGISTER  
MEMORY  
POINTER  
Serial Data Input  
Parity Enable  
ERR  
VCC  
GND  
Error Indication Pin  
+5V Power Supply  
Ground  
35C704 F02  
Note:  
(1) DI, DO may be tied together to form a common I/O.  
© 1998 by Catalyst Semiconductor, Inc.  
Doc. No. 25045-00 2/98  
Characteristics subject to change without notice  
1

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