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CAT34FC02JE-TE13REV-E PDF预览

CAT34FC02JE-TE13REV-E

更新时间: 2024-11-19 19:50:11
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
10页 414K
描述
EEPROM, 256X8, Serial, CMOS, PDSO8, SOIC-8

CAT34FC02JE-TE13REV-E 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.92
最大时钟频率 (fCLK):0.1 MHzJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.9 mm
内存密度:2048 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:8字数:256 words
字数代码:256工作模式:SYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:256X8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:SERIAL
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1.75 mm串行总线类型:I2C
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
最长写入周期时间 (tWC):5 msBase Number Matches:1

CAT34FC02JE-TE13REV-E 数据手册

 浏览型号CAT34FC02JE-TE13REV-E的Datasheet PDF文件第2页浏览型号CAT34FC02JE-TE13REV-E的Datasheet PDF文件第3页浏览型号CAT34FC02JE-TE13REV-E的Datasheet PDF文件第4页浏览型号CAT34FC02JE-TE13REV-E的Datasheet PDF文件第5页浏览型号CAT34FC02JE-TE13REV-E的Datasheet PDF文件第6页浏览型号CAT34FC02JE-TE13REV-E的Datasheet PDF文件第7页 
E
CAT34FC02  
2-kb I2C Serial EEPROM, Serial Presence Detect  
TM  
FEATURES  
I 400 kHz (2.5 V) and 100 kHz (1.7 V) I2C bus  
I Permanent software write protection for lower  
compatible  
128 bytes  
I 1.7 to 5.5 volt operation  
I Low power CMOS technology  
I 16-byte page write buffer  
I 1,000,000 program/erase cycles  
I 100 year data retention  
I 8-pin DIP, 8-pin SOIC, 8-pin TSSOP and TDFN  
packages  
I Commercial, industrial and automotive  
temperature ranges  
- “Green” package option available  
I 256 x 8 memory organization  
I Hardware write protect  
I Self-timed write cycle with auto-clear  
DESCRIPTION  
a 16-byte page write buffer. The device operates via the  
I2C bus serial interface and is available in 8-pin DIP,  
8-pin SOIC, 8-pin TSSOP and TDFN packages.  
The CAT34FC02 is a 2-kb Serial CMOS EEPROM  
internallyorganizedas256wordsof8bitseach.Catalyst’s  
advanced CMOS technology substantially reduces  
device power requirements. The CAT34FC02 features  
PIN CONFIGURATION  
BLOCK DIAGRAM  
V
CC  
DIP Package (P, L)  
SOIC Package (J, W)  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
A
A
A
V
A
A
A
0
1
2
CC  
0
1
2
V
CC  
WP  
WP  
SCL  
SCL  
SDA  
SCL  
SDA  
V
V
SS  
SS  
A2, A1, A0  
WP  
CAT34FC02  
SDA  
TDFN Package (SP2, VP2)  
A
V
1
2
3
4
8
7
6
5
1
2
3
CC  
A
A
WP  
V
SS  
SCL  
SDA  
V
SS  
PIN FUNCTIONS  
TSSOP Package (U, Y)  
Pin Name  
Function  
1
2
3
4
8
7
6
5
A
0
V
CC  
WP  
A0, A1, A2  
SDA  
Device Address Inputs  
Serial Data/Address  
Serial Clock  
A
A
1
2
SCL  
SDA  
V
SS  
SCL  
WP  
Write Protect  
VCC  
1.7 V to 5.5 V Power Supply  
Ground  
VSS  
2
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I C Bus Protocol.  
© 2004 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc No. 1045, Rev. H  
1

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