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CAT28F020G-90T PDF预览

CAT28F020G-90T

更新时间: 2024-10-31 05:17:35
品牌 Logo 应用领域
CATALYST 闪存存储内存集成电路
页数 文件大小 规格书
15页 431K
描述
2 Megabit CMOS Flash Memory

CAT28F020G-90T 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFJ包装说明:QCCJ, LDCC32,.5X.6
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.36Is Samacsys:N
最长访问时间:90 ns命令用户界面:YES
数据轮询:NO耐久性:100000 Write/Erase Cycles
JESD-30 代码:R-PQCC-J32JESD-609代码:e3
长度:13.97 mm内存密度:2097152 bit
内存集成电路类型:FLASH内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:32字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX8封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC32,.5X.6
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:5 V编程电压:12 V
认证状态:Not Qualified座面最大高度:3.55 mm
最大待机电流:0.00001 A子类别:Flash Memories
最大压摆率:0.03 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
切换位:NO类型:NOR TYPE
宽度:11.43 mmBase Number Matches:1

CAT28F020G-90T 数据手册

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E
CAT28F020  
2 Megabit CMOS Flash Memory  
Licensed Intel second source  
FEATURES  
TM  
I Commercial, industrial and automotive  
I Fast read access time: 90/120 ns  
temperature ranges  
I Low power CMOS dissipation:  
– Active: 30 mA max (CMOS/TTL levels)  
– Standby: 1 mA max (TTL levels)  
– Standby: 100 µA max (CMOS levels)  
I Stop timer for program/erase  
I On-chip address and data latches  
I JEDEC standard pinouts:  
– 32-pin DIP  
I High speed programming:  
– 10 µs per byte  
– 32-pin PLCC  
– 32-pin TSOP (8 x 20)  
– 4 seconds typical chip program  
I 100,000 program/erase cycles  
I 10 year data retention  
I Electronic signature  
I 0.5 seconds typical chip-erase  
I 12.0V 5% programming and erase voltage  
DESCRIPTION  
using a two write cycle scheme. Address and Data are  
latched to free the I/O bus and address bus during the  
write operation.  
TheCAT28F020isahighspeed256Kx8-bitelectrically  
erasable and reprogrammable Flash memory ideally  
suited for applications requiring in-system or after-sale  
code updates. Electrical erasure of the full memory  
contents is achieved typically within 0.5 second.  
The CAT28F020 is manufactured using Catalyst’s  
advancedCMOSfloatinggatetechnology. Itisdesigned  
to endure 100,000 program/erase cycles and has a data  
retention of 10 years. The device is available in JEDEC  
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin  
TSOP packages.  
It is pin and Read timing compatible with standard  
EPROM and E2PROM devices. Programming and  
Erase are performed through an operation and verify  
algorithm. The instructions are input via the I/O bus,  
BLOCK DIAGRAM  
I/O –I/O  
0
7
I/O BUFFERS  
ERASE VOLTAGE  
SWITCH  
WE  
DATA  
LATCH  
SENSE  
AMP  
COMMAND  
REGISTER  
PROGRAM VOLTAGE  
SWITCH  
CE, OE LOGIC  
CE  
OE  
Y-GATING  
Y-DECODER  
2,097,152 BIT  
MEMORY  
ARRAY  
A –A  
17  
0
X-DECODER  
VOLTAGE VERIFY  
SWITCH  
5115 FHD F02  
© 2004 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1029, Rev. C  
1

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