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CAT28C65BLA-15 PDF预览

CAT28C65BLA-15

更新时间: 2024-10-29 12:59:59
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
13页 418K
描述
EEPROM, 8KX8, 150ns, Parallel, CMOS, PDIP28, LEAD FREE AND HALOGEN FREE, PLASTIC, DIP-28

CAT28C65BLA-15 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:DIP包装说明:DIP, DIP28,.6
针数:28Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.05最长访问时间:150 ns
命令用户界面:NO数据轮询:YES
耐久性:100000 Write/Erase CyclesJESD-30 代码:R-PDIP-T28
JESD-609代码:e3长度:36.695 mm
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:28字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:105 °C最低工作温度:-40 °C
组织:8KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP28,.6
封装形状:RECTANGULAR封装形式:IN-LINE
页面大小:32 words并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
编程电压:5 V认证状态:Not Qualified
就绪/忙碌:YES座面最大高度:5.08 mm
最大待机电流:0.0001 A子类别:EEPROMs
最大压摆率:0.03 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
切换位:YES宽度:15.24 mm
最长写入周期时间 (tWC):5 msBase Number Matches:1

CAT28C65BLA-15 数据手册

 浏览型号CAT28C65BLA-15的Datasheet PDF文件第2页浏览型号CAT28C65BLA-15的Datasheet PDF文件第3页浏览型号CAT28C65BLA-15的Datasheet PDF文件第4页浏览型号CAT28C65BLA-15的Datasheet PDF文件第5页浏览型号CAT28C65BLA-15的Datasheet PDF文件第6页浏览型号CAT28C65BLA-15的Datasheet PDF文件第7页 
E
CAT28C65B  
64K-Bit CMOS PARALLEL EEPROM  
TM  
FEATURES  
I Fast read access times:  
I Commercial, industrial and automotive  
– 90/120/150ns  
temperature ranges  
I Low power CMOS dissipation:  
– Active: 25 mA max.  
I Automatic page write operation:  
– 1 to 32 bytes in 5ms  
– Standby: 100 µA max.  
– Page load timer  
I Simple write operation:  
I End of write detection:  
– Toggle bit  
– On-chip address and data latches  
– Self-timed write cycle with auto-clear  
DATA polling  
– RDY/BUSY  
I Fast write cycle time:  
– 5ms max  
I 100,000 program/erase cycles  
I 100 year data retention  
I CMOS and TTL compatible I/O  
I Hardware and software write protection  
DESCRIPTION  
The CAT28C65B is a fast, low power, 5V-only CMOS  
parallel EEPROM organized as 8K x 8-bits. It requires a  
simple interface for in-system programming. On-chip  
address and data latches, self-timed write cycle with  
auto-clear and VCC power up/down write protection  
eliminate additional timing and protection hardware.  
DATA Polling, a RDY/BUSY pin and Toggle status bits  
signal the start and end of the self-timed write cycle.  
Additionally, the CAT28C65B features hardware and  
software write protection.  
The CAT28C65B is manufactured using Catalyst’s  
advancedCMOSfloatinggatetechnology.Itisdesigned  
to endure 100,000 program/erase cycles and has a data  
retentionof100years.ThedeviceisavailableinJEDEC-  
approved 28-pin DIP, 28-pin TSOP, 28-pin SOIC or 32-  
pin PLCC packages.  
BLOCK DIAGRAM  
8,192 x 8  
EEPROM  
ARRAY  
ROW  
DECODER  
ADDR. BUFFER  
& LATCHES  
A A  
5
12  
INADVERTENT  
WRITE  
PROTECTION  
HIGH VOLTAGE  
GENERATOR  
32 BYTE PAGE  
REGISTER  
V
CC  
CE  
OE  
WE  
CONTROL  
LOGIC  
I/O BUFFERS  
DATA POLLING,  
TOGGLE BIT &  
TIMER  
RDY/BUSY LOGIC  
I/O I/O  
0
7
ADDR. BUFFER  
& LATCHES  
A A  
COLUMN  
DECODER  
0
4
RDY/BUSY  
© 2005 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1009, Rev. E  
1

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