CAT28C65B
E
CAT28C65B
64K-Bit CMOS PARALLEL EEPROM
TM
FEATURES
I Fast read access times:
I Commercial, industrial and automotive
– 90/120/150ns
temperature ranges
I Low power CMOS dissipation:
– Active: 25 mA max.
I Automatic page write operation:
– 1 to 32 bytes in 5ms
– Standby: 100 µA max.
– Page load timer
I Simple write operation:
I End of write detection:
– Toggle bit
– On-chip address and data latches
– Self-timed write cycle with auto-clear
– DATA polling
– RDY/BUSY
I Fast write cycle time:
– 5ms max
I 100,000 program/erase cycles
I 100 year data retention
I CMOS and TTL compatible I/O
I Hardware and software write protection
DESCRIPTION
The CAT28C65B is a fast, low power, 5V-only CMOS
parallel EEPROM organized as 8K x 8-bits. It requires a
simple interface for in-system programming. On-chip
address and data latches, self-timed write cycle with
auto-clear and VCC power up/down write protection
eliminate additional timing and protection hardware.
DATA Polling, a RDY/BUSY pin and Toggle status bits
signal the start and end of the self-timed write cycle.
Additionally, the CAT28C65B features hardware and
software write protection.
The CAT28C65B is manufactured using Catalyst’s
advancedCMOSfloatinggatetechnology.Itisdesigned
to endure 100,000 program/erase cycles and has a data
retentionof100years.ThedeviceisavailableinJEDEC-
approved 28-pin DIP, 28-pin TSOP, 28-pin SOIC or 32-
pin PLCC packages.
BLOCK DIAGRAM
8,192 x 8
EEPROM
ARRAY
ROW
DECODER
ADDR. BUFFER
& LATCHES
A –A
5
12
INADVERTENT
WRITE
PROTECTION
HIGH VOLTAGE
GENERATOR
32 BYTE PAGE
REGISTER
V
CC
CE
OE
WE
CONTROL
LOGIC
I/O BUFFERS
DATA POLLING,
TOGGLE BIT &
TIMER
RDY/BUSY LOGIC
I/O –I/O
0
7
ADDR. BUFFER
& LATCHES
A –A
COLUMN
DECODER
0
4
RDY/BUSY
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 1009, Rev. E
Doc. No. 1009, Rev. E
1