Datasheet > 存储 > EEPROM> CAT28C257P-15T

CAT28C257P-15T

更新时间： 2024-10-27 03:03:19

品牌	Logo	应用领域
CATALYST		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
12页	523K
描述
256K-Bit CMOS PARALLEL EEPROM

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中文翻译

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数据手册

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CAT28C257P-15T 数据手册

CAT28C257

256K-Bit CMOS PARALLEL EEPROM

FEATURES

■ Automatic page write operation:

–1 to 128 Bytes in 5ms

–Page load timer

■ Fast read access times: 120/150 ns

■ Low power CMOS dissipation:

–Active: 25 mA max.

■ End of write detection:

–Toggle bit

–Standby: 150 µA max.

■ Simple write operation:

–DATA polling

–On-chip address and data latches

–Self-timed write cycle with auto-clear

■ Hardware and software write protection

■ 100,000 Program/erase cycles

■ 100 Year data retention

■ Fast write cycle time:

–5ms max

■ CMOS and TTL compatible I/O

■ Commercial, industrial and automotive

temperature ranges

DESCRIPTION

The CAT28C257 is a fast, low power, 5V-only CMOS

Parallel EEPROM organized as 32K x 8-bits. It requires a

simple interface for in-system programming. On-chip

addressanddatalatches,self-timedwritecyclewithauto-

clear and V_CCpower up/down write protection eliminate

additional timing and protection hardware. DATA Polling

and Toggle status bits signal the start and end of the self-

timed write cycle. Additionally, the CAT28C257 features

hardware and software write protection.

The CAT28C257 is manufactured using Catalyst’s

advanced CMOS floating gate technology. It is designed

to endure 100,000 program/erase cycles and has a data

retention of 100 years. The device is available in JEDEC

approved 28-pin DIP or 32-pin PLCC packages.

BLOCK DIAGRAM

32,768 x 8

EEPROM

ARRAY

ROW

DECODER

ADDR. BUFFER

A –A

& LATCHES

INADVERTENT

WRITE

PROTECTION

HIGH VOLTAGE

GENERATOR

128 BYTE PAGE

CONTROL

LOGIC

I/O BUFFERS

DATA POLLING

AND

TIMER

TOGGLE BIT

I/O –I/O

ADDR. BUFFER

& LATCHES

A –A

COLUMN

DECODER

Characteristics subject to change without notice

Doc. No. 1015, Rev. D

12 3 4 5 6 7...12

中文翻译

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