Advanced
CAT28C257
256K-Bit CMOS PARALLEL E2PROM
FEATURES
■ Automatic Page Write Operation:
–1 to 128 Bytes in 5ms
■ Fast Read Access Times: 90/120/150 ns
■ Low Power CMOS Dissipation:
–Active: 25 mA Max.
–Page Load Timer
■ End of Write Detection:
–Toggle Bit
–Standby: 150 µA Max.
■ Simple Write Operation:
–DATA Polling
–On-Chip Address and Data Latches
–Self-Timed Write Cycle with Auto-Clear
■ Hardware and Software Write Protection
■ 100,000 Program/Erase Cycles
■ 100 Year Data Retention
■ Fast Write Cycle Time:
–5ms Max
■ CMOS and TTL Compatible I/O
■ Commercial, Industrial and Automotive
Temperature Ranges
DESCRIPTION
The CAT28C257 is a fast, low power, 5V-only CMOS
Parallel E2PROM organized as 32K x 8-bits. It requires a
simple interface for in-system programming. On-chip
addressanddatalatches,self-timedwritecyclewithauto-
clear and VCC power up/down write protection eliminate
additional timing and protection hardware. DATA Polling
and Toggle status bits signal the start and end of the self-
timed write cycle. Additionally, the CAT28C257 features
hardware and software write protection.
The CAT28C257 is manufactured using Catalyst’s ad-
vanced CMOS floating gate technology. It is designed to
endure 100,000 program/erase cycles and has a data
retention of 100 years. The device is available in JEDEC
approved 28-pin DIP, 28-pin TSOP or 32-pin PLCC
packages.
BLOCK DIAGRAM
32,768 x 8
E2PROM
ARRAY
ROW
DECODER
ADDR. BUFFER
A –A
7
14
& LATCHES
INADVERTENT
WRITE
PROTECTION
HIGH VOLTAGE
GENERATOR
128 BYTE PAGE
REGISTER
V
CC
CE
OE
WE
CONTROL
LOGIC
I/O BUFFERS
DATA POLLING
AND
TIMER
TOGGLE BIT
I/O –I/O
0
7
ADDR. BUFFER
& LATCHES
A –A
COLUMN
DECODER
0
6
5096 FHD F02
© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25073-00 2/98
1