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CAT25C64SI-1.8-G PDF预览

CAT25C64SI-1.8-G

更新时间: 2024-12-02 08:19:35
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
16页 234K
描述
EEPROM, 8KX8, Serial, CMOS, PDSO8

CAT25C64SI-1.8-G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP, SOP8,.25Reach Compliance Code:unknown
风险等级:5.84数据保留时间-最小值:100
耐久性:1000000 Write/Erase CyclesJESD-30 代码:R-PDSO-G8
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8端子数量:8
字数:8192 words字数代码:8000
最高工作温度:85 °C最低工作温度:-40 °C
组织:8KX8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL电源:2/5 V
认证状态:Not Qualified串行总线类型:SPI
最大待机电流:0.000001 A子类别:EEPROMs
最大压摆率:0.01 mA表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL写保护:HARDWARE/SOFTWARE
Base Number Matches:1

CAT25C64SI-1.8-G 数据手册

 浏览型号CAT25C64SI-1.8-G的Datasheet PDF文件第2页浏览型号CAT25C64SI-1.8-G的Datasheet PDF文件第3页浏览型号CAT25C64SI-1.8-G的Datasheet PDF文件第4页浏览型号CAT25C64SI-1.8-G的Datasheet PDF文件第5页浏览型号CAT25C64SI-1.8-G的Datasheet PDF文件第6页浏览型号CAT25C64SI-1.8-G的Datasheet PDF文件第7页 
CAT25C64  
64K-Bit SPI Serial CMOS EEPROM  
FEATURES  
DESCRIPTION  
I 10 MHz SPI compatible  
I 1.8 to 5.5 volt operation  
I Hardware and software protection  
I Low power CMOS technology  
I SPI modes (0,0 &1,1)  
TheCAT25C64isa64K-BitSPISerialCMOSEEPROM  
internally organized as 8Kx8 bits. Catalyst’s advanced  
CMOS Technology substantially reduces device power  
requirements. The CAT25C64 features a 64-byte page  
write buffer. The device operates via the SPI bus serial  
interface and is enabled though a Chip Select (CS). In  
addition to the Chip Select, the clock input (SCK), data  
in (SI) and data out (SO) are required to access the  
device. The HOLD pin may be used to suspend any  
serial communication without resetting the serial se-  
quence. The CAT25C64 is designed with software and  
hardware write protection features including Block write  
protection. The device is available in 8-pin DIP and  
SOIC packages.  
I Commercial, industrial and automotive  
temperature ranges  
I 1,000,000 program/erase cycles  
I 100 year data tetention  
I Self-timed write cycle  
I 8-pin DIP and SOIC  
I 64-Byte page write buffer  
I Block write protection  
– Protect 1/4, 1/2 or all of EEPROM array  
PIN CONFIGURATION  
FUNCTIONAL SYMBOL  
V
CC  
PDIP (P, L)  
SOIC (S, V)  
CS  
1
8
V
CC  
SI  
CS  
SO  
2
3
4
7
6
5
HOLD  
SCK  
SI  
CAT25C64  
WP  
WP  
SO  
V
SS  
HOLD  
SCK  
PIN FUNCTIONS  
Pin Name  
SO  
Function  
V
SS  
Serial Data Output  
Serial Clock  
SCK  
WP  
Write Protect  
VCC  
+1.8V to +5.5V Power Supply  
Ground  
VSS  
CS  
Chip Select  
SI  
Serial Data Input  
Suspends Serial Input  
HOLD  
© 2006 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1112, Rev. B  
1

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