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CAT25C64S-G PDF预览

CAT25C64S-G

更新时间: 2024-12-01 13:06:39
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
11页 76K
描述
EEPROM, 8KX8, Serial, CMOS, PDSO8

CAT25C64S-G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP, SOP8,.25Reach Compliance Code:unknown
风险等级:5.84数据保留时间-最小值:100
耐久性:1000000 Write/Erase CyclesJESD-30 代码:R-PDSO-G8
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8端子数量:8
字数:8192 words字数代码:8000
最高工作温度:70 °C最低工作温度:
组织:8KX8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL电源:3/5 V
认证状态:Not Qualified串行总线类型:SPI
最大待机电流:0.000001 A子类别:EEPROMs
最大压摆率:0.01 mA表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL写保护:HARDWARE/SOFTWARE
Base Number Matches:1

CAT25C64S-G 数据手册

 浏览型号CAT25C64S-G的Datasheet PDF文件第2页浏览型号CAT25C64S-G的Datasheet PDF文件第3页浏览型号CAT25C64S-G的Datasheet PDF文件第4页浏览型号CAT25C64S-G的Datasheet PDF文件第5页浏览型号CAT25C64S-G的Datasheet PDF文件第6页浏览型号CAT25C64S-G的Datasheet PDF文件第7页 
(Not recommended for new design,  
replace with CAT25320)  
E
CAT25C32/64  
32K/64K-Bit SPI Serial CMOS EEPROM  
TM  
FEATURES  
1,000,000 program/erase cycles  
100 year data tetention  
Self-timed write cycle  
10 MHz SPI compatible  
1.8 to 6.0 volt operation  
Hardware and software protection  
Low power CMOS technology  
SPI modes (0,0 &1,1)  
8-pin DIP/SOIC, 14-pin TSSOP and 20-pin  
TSSOP  
64-Byte page write buffer  
Commercial, industrial and automotive  
Block write protection  
temperature ranges  
– Protect 1/4, 1/2 or all of EEPROM array  
DESCRIPTION  
required to access the device. The HOLD pin may be  
used to suspend any serial communication without  
resetting the serial sequence. The CAT25C32/64 is  
designed with software and hardware write protection  
features including Block write protection. The device is  
available in 8-pin DIP, 8-pin SOIC, 14-pin TSSOP and  
20-pin TSSOP packages.  
The CAT25C32/64 is a 32K/64K-Bit SPI Serial CMOS  
EEPROM internally organized as 4Kx8/8Kx8 bits.  
Catalyst’s advanced CMOS Technology substantially  
reduces device power requirements. The CAT25C32/  
64 features a 64-byte page write buffer. The device  
operates via the SPI bus serial interface and is enabled  
thoughaChipSelect(CS). InadditiontotheChipSelect,  
the clock input (SCK), data in (SI) and data out (SO) are  
PIN CONFIGURATION  
DIP Package (P, L)  
SOIC Package (S, V)  
TSSOP Package (U14, Y14)  
TSSOP Package (U20, Y20)  
1
2
3
4
8
7
6
5
1
1
2
3
4
8
7
6
5
NC  
VCC  
HOLD  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
8
NC  
CS  
SO  
SO  
NC  
NC  
WP  
SS  
NC  
NC  
20  
19  
18  
VCC  
HOLD  
NC  
NC  
NC  
V
CS  
SO  
WP  
CS  
SO  
NC  
NC  
NC  
WP  
CS  
SO  
CC  
CC  
2
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
3
WP  
17 HOLD  
NC  
16  
15 NC  
14 SCK  
13 SI  
12 NC  
11 NC  
4
V
V
5
SS  
SS  
6
SCK  
SI  
V
7
SS  
V
8
9
BLOCK DIAGRAM  
10  
SENSE AMPS  
SHIFT REGISTERS  
COLUMN  
DECODERS  
WORD ADDRESS  
BUFFERS  
PIN FUNCTIONS  
Pin Name  
Function  
SO  
SI  
I/O  
CONTROL  
SO  
Serial Data Output  
Serial Clock  
E2PROM  
ARRAY  
CS  
SPI  
CONTROL  
LOGIC  
XDEC  
SCK  
WP  
VCC  
VSS  
CS  
WP  
HOLD  
SCK  
Write Protect  
+1.8V to +6.0V Power Supply  
Ground  
BLOCK  
PROTECT  
LOGIC  
DATA IN  
STORAGE  
Chip Select  
SI  
Serial Data Input  
Suspends Serial Input  
HIGH VOLTAGE/  
TIMING CONTROL  
HOLD  
STATUS  
NC  
No Connect  
REGISTER  
© 2004 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc No. 1001, Rev. G  

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