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CAT25C256X

更新时间： 2024-11-06 09:54:55
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管
页数 文件大小 规格书
12页 81K
描述
EEPROM, 32KX8, Serial, CMOS, PDSO8, LEAD AND HALOGEN FREE, EIAJ, SOIC-8

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中文翻译

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CAT25C256X 数据手册

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E
CAT25C128/256  
128K/256K-Bit SPI Serial CMOS EEPROM  
E TM  
R
FEATURES  
■ 100,000 Program/Erase Cycles  
■ 100 Year Data Retention  
■ Self-Timed Write Cycle  
■ 5 MHz SPI Compatible  
■ 1.8 to 6.0 Volt Operation  
■ Hardware and Software Protection  
■ Low Power CMOS Technology  
■ SPI Modes (0,0 &1,1)*  
■ 8-Pin DIP/SOIC, 16-Pin SOIC, 14-Pin TSSOP  
and 20-Pin TSSOP  
■ 64-Byte Page Write Buffer  
■ Commercial, Industrial and Automotive  
■ Block Write Protection  
Temperature Ranges  
– Protect 1/4, 1/2 or all of EEPROM Array  
DESCRIPTION  
The CAT25C128/256 is a 128K/256K-Bit SPI Serial  
CMOS EEPROM internally organized as 16Kx8/32Kx8  
bits. Catalyst’s advanced CMOS Technology  
substantially reduces device power requirements. The  
CAT25C128/256 features a 64-byte page write buffer.  
The device operates via the SPI bus serial interface  
and is enabled through a Chip Select (CS). In addition  
to the Chip Select, the clock input (SCK), data in (SI)  
and data out (SO) are required to access the device.  
The HOLD pin may be used to suspend any serial  
communication without resetting the serial sequence.  
The CAT25C128/256 is designed with software and  
hardware write protection features including Block Lock  
protection. The device is available in 8-pin DIP, 8-pin  
SOIC, 16-pin SOIC, 14-pin TSSOP and 20-pin TSSOP  
packages.  
PIN CONFIGURATION  
BLOCK DIAGRAM  
TSSOP Package (U14, Y)**  
SOIC Package  
(S**, K, V**, X)  
DIP Package (P, L)  
1
2
3
4
5
14  
13  
12  
11  
10  
CS  
V
CC  
SENSE AMPS  
SHIFT REGISTERS  
1
2
3
4
8
7
6
5
V
CS  
SO  
CC  
SO  
NC  
HOLD  
NC  
1
2
3
4
8
7
6
5
V
CS  
SO  
WP  
CC  
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
WP  
NC  
NC  
WP  
NC  
NC  
SCK  
SI  
V
SS  
COLUMN  
DECODERS  
V
WORD ADDRESS  
BUFFERS  
SS  
6
7
9
8
V
SS  
SOIC Package (S16, V)**  
TSSOP Package (U20, Y)**  
SO  
SI  
I/O  
CONTROL  
16  
CS  
SO  
NC  
NC  
NC  
NC  
WP  
VSS  
1
2
3
4
5
6
7
8
V
1
2
3
4
5
20  
19  
18  
17  
16  
NC  
CS  
CC  
NC  
V
HOLD  
HOLD  
NC  
HOLD  
15  
14  
13  
12  
11  
10  
9
CC  
NC  
CS  
EEPROM  
ARRAY  
SO  
SO  
SPI  
CONTROL  
LOGIC  
XDEC  
NC  
WP  
NC  
NC  
WP  
NC  
HOLD  
SCK  
6
15  
14  
13  
12  
11  
NC  
SCK  
NC  
7
SCK  
SI  
V
SI  
NC  
NC  
8
BLOCK  
PROTECT  
LOGIC  
SS  
NC  
NC  
9
10  
PIN FUNCTIONS  
DATA IN  
STORAGE  
Pin Name  
Function  
SO  
SCK  
WP  
Serial data Output  
Serial Clock  
HIGH VOLTAGE/  
TIMING CONTROL  
Write Protect  
STATUS  
REGISTER  
VCC  
VSS  
+1.8V to +6.0V Power Supply  
Ground  
CS  
Chip Select  
SI  
HOLD  
NC  
Serial Data Input  
Suspends Serial Input  
No Connect  
* Other SPI modes available on request.  
**CAT25C128 only.  
© 2005 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1018, Rev. H  
1
1234567...12

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