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CAT25C05V

更新时间： 2024-10-31 23:39:43
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
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11页 88K
描述
EEPROM

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CAT25C05V 数据手册

 浏览型号CAT25C05V的Datasheet PDF文件第2页浏览型号CAT25C05V的Datasheet PDF文件第3页浏览型号CAT25C05V的Datasheet PDF文件第4页浏览型号CAT25C05V的Datasheet PDF文件第5页浏览型号CAT25C05V的Datasheet PDF文件第6页浏览型号CAT25C05V的Datasheet PDF文件第7页 
E
CAT25C11/03/05/09/17  
1K/2K/4K/8K/16K SPI Serial CMOS EEPROM  
FEATURES  
TM  
■ 1,000,000 program/erase cycles  
■ 100 year data retention  
■ Self-timed write cycle  
■ 10 MHz SPI compatible  
■ 1.8 to 6.0 volt operation  
■ Hardware and software protection  
■ Zero standby current  
■ 8-pin DIP/SOIC, 8/14-pin TSSOP and 8-pin MSOP  
■ 16/32-byte page write buffer  
■ Low power CMOS technology  
■ SPI modes (0,0 & 1,1)*  
■ Write protection  
– Protect first page, last page, any 1/4 array or  
lower 1/2 array  
■ Commercial, industrial, automotive and extended  
temperature ranges  
DESCRIPTION  
input (SCK), data in (SI) and data out (SO) are required  
to access the device. The HOLD pin may be used to  
suspend any serial communication without resetting the  
serialsequence.TheCAT25C11/03/05/09/17isdesigned  
with software and hardware write protection features  
including Block Write protection. The device is available  
in 8-pin DIP, 8-pin SOIC, 8/14-pin TSSOP and 8-pin  
MSOP packages.  
The CAT25C11/03/05/09/17 is a 1K/2K/4K/8K/16K-Bit  
SPI Serial CMOS EEPROM internally organized as  
128x8/256x8/512x8/1024x8/2048x8 bits. Catalyst’s  
advanced CMOS Technology substantially reduces  
device power requirements. The CAT25C11/03/05  
features a 16-byte page write buffer. The 25C09/17  
featuresa32-bytepagewritebuffer.Thedeviceoperates  
via the SPI bus serial interface and is enabled though a  
ChipSelect(CS).InadditiontotheChipSelect,theclock  
PIN CONFIGURATION  
DIP Package (P, L)  
SOIC Package (S, V)  
TSSOP Package (U, Y)  
TSSOP Package (U14, Y)  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V
CC  
V
CS  
SO  
WP  
CS  
SO  
CS  
SO  
NC  
NC  
V
CC  
1
2
3
4
8
7
6
5
CC  
CS  
V
CC  
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
HOLD  
SO  
HOLD  
SCK  
SI  
NC  
WP  
WP  
NC  
V
V
V
SS  
SS  
SS  
NC  
NC  
WP  
SCK  
SI  
MSOP Package (R, Z)*  
BLOCK DIAGRAM  
V
SS  
8
1
2
3
4
8
7
6
5
CS  
SO  
WP  
V
CC  
HOLD  
SCK  
SENSE AMPS  
SHIFT REGISTERS  
V
SI  
SS  
*CAT25C11/03 only  
COLUMN  
DECODERS  
PIN FUNCTIONS  
WORD ADDRESS  
BUFFERS  
Pin Name  
SO  
Function  
Serial Data Output  
Serial Clock  
SO  
SI  
I/O  
CONTROL  
SCK  
WP  
CS  
EEPROM  
ARRAY  
SPI  
CONTROL  
LOGIC  
XDEC  
Write Protect  
WP  
HOLD  
SCK  
VCC  
+1.8V to +6.0V Power Supply  
Ground  
VSS  
BLOCK  
PROTECT  
LOGIC  
CS  
Chip Select  
DATA IN  
STORAGE  
SI  
Serial Data Input  
Suspends Serial Input  
No Connect  
HOLD  
NC  
HIGH VOLTAGE/  
TIMING CONTROL  
STATUS  
REGISTER  
* Other SPI modes available on request.  
© 2002 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1017, Rev. F  
1
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