Datasheet > CAT25640LIT3

CAT25640LIT3

更新时间： 2024-09-16 04:51:59

品牌	Logo	应用领域
CATALYST		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
16页	234K
描述
64-Kb SPI Serial CMOS EEPROM

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中文翻译

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数据手册

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CAT25640LIT3 数据手册

CAT25640

64-Kb SPI Serial CMOS EEPROM

FEATURES

DESCRIPTION

10 MHz SPI compatible

The CAT25640 is a 64-Kb Serial CMOS EEPROM

device internally organized as 8Kx8 bits. This features

a 64-byte page write buffer and supports the Serial

Peripheral Interface (SPI) protocol. The device is

1.8V to 5.5V supply voltage range

SPI modes (0,0) & (1,1)

¯¯

64-byte page write buffer

enabled through a Chip Select (CS) input. In addition,

the required bus signals are clock input (SCK), data

Self-timed write cycle

¯¯¯¯¯

input (SI) and data output (SO) lines. The HOLD input

Hardware and software protection

Block write protection

may be used to pause any serial communication with

the CAT25640 device. The device features software

and hardware write protection, including partial as

well as full array protection.

– Protect 1/4, 1/2 or entire EEPROM array

Low power CMOS technology

1,000,000 program/erase cycles

100 year data retention

Industrial temperature range

RoHS-compliant 8 lead PDIP, SOIC, TSSOP and

8-pad TDFN packages

PIN CONFIGURATION

FUNCTIONAL SYMBOL

V_CC

PDIP (L)

SOIC (V)

TSSOP (Y)

TDFN (VP2)

¯¯

V_CC

CAT25640

HOLD

SCK

¯¯¯¯¯

HOLD

¯¯¯

SCK

V_SS

PIN FUNCTION

Pin Name

Function

¯¯

Chip Select

For Ordering Information details, see page 15.

Serial Data Output

Write Protect

¯¯¯

V_SS

Ground

Serial Data Input

Serial Clock

SCK

¯¯¯¯¯

Hold Transmission Input

Power Supply

HOLD

V_CC

Characteristics subject to change without notice

Doc. No. MD-1128 Rev. B

12 3 4 5 6 7...16

中文翻译

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