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CAT25020SE-1.8 PDF预览

CAT25020SE-1.8

更新时间： 2024-11-18 23:39:39
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
10页 80K
描述
EEPROM

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CAT25020SE-1.8 数据手册

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E
CAT25010/20/40  
1K/2K/4K SPI Serial CMOS EEPROM  
TM  
FEATURES  
■ 1,000,000 program/erase cycles  
■ 100 year data retention  
■ Self-timed write cycle  
■ 10 MHz SPI compatible  
■ 1.8 to 6.0 volt operation  
■ Hardware and software protection  
■ Zero standby current  
■ 8-Pin DIP/SOIC, 8-Pin TSSOP and 8-Pin MSOP  
■ 16-byte page write buffer  
■ Low power CMOS technology  
■ SPI modes (0,0 & 1,1)*  
■ Block write protection  
– Protect 1/4, 1/2 or all of EEPROM array  
■ Commercial, industrial, automotive and extended  
temperature ranges  
DESCRIPTION  
Chip Select, the clock input (SCK), data in (SI) and data  
out (SO) are required to access the device. The HOLD  
pin may be used to suspend any serial communication  
without resetting the serial sequence. The CAT25010/  
20/40 is designed with software and hardware write  
protectionfeaturesincludingBlockWriteprotection.The  
deviceisavailablein8-pinDIP, 8-pinSOIC, 8-pinMSOP  
and 8-pin TSSOP packages.  
The CAT25010/20/40 is a 1K/2K/4K Bit SPI Serial  
CMOS EEPROM internally organized as 128x8/256x8/  
512x8 bits. Catalyst’s advanced CMOS Technology  
substantially reduces device power requirements. The  
CAT25010/20/40 features a 16-byte page write buffer.  
The device operates via the SPI bus serial interface and  
is enabled though a Chip Select (CS). In addition to the  
PIN CONFIGURATION  
BLOCK DIAGRAM  
SOIC Package (S, V)  
MSOP Package (R, Z)*  
1
2
3
4
8
7
6
5
CS  
SO  
WP  
V
CC  
SENSE AMPS  
SHIFT REGISTERS  
1
2
3
4
8
7
6
5
V
CS  
SO  
WP  
CC  
HOLD  
SCK  
HOLD  
SCK  
SI  
V
SI  
SS  
V
SS  
COLUMN  
DECODERS  
*CAT 25010/20 only  
WORD ADDRESS  
BUFFERS  
DIP Package (P, L)  
TSSOP Package (U, Y)  
1
2
3
4
8
7
6
5
V
CS  
SO  
1
2
3
4
8
7
6
5
CC  
CS  
SO  
SO  
SI  
V
I/O  
CONTROL  
CC  
HOLD  
SCK  
SI  
HOLD  
SCL  
SI  
WP  
WP  
E2PROM  
ARRAY  
CS  
V
V
SS  
SPI  
CONTROL  
LOGIC  
XDEC  
SS  
WP  
HOLD  
SCK  
PIN FUNCTIONS  
Pin Name  
SO  
Function  
BLOCK  
PROTECT  
LOGIC  
Serial Data Output  
Serial Clock  
DATA IN  
STORAGE  
SCK  
WP  
Write Protect  
HIGH VOLTAGE/  
TIMING CONTROL  
VCC  
+1.8V to +6.0V Power Supply  
Ground  
STATUS  
REGISTER  
VSS  
CS  
Chip Select  
SI  
Serial Data Input  
Suspends Serial Input  
No Connect  
HOLD  
NC  
* Other SPI modes available on request.  
© 2002 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1006, Rev. G  
1
1234567...10

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