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CAT24C21LI-REVB PDF预览

CAT24C21LI-REVB

更新时间: 2024-11-23 13:06:35
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
12页 68K
描述
EEPROM, 128X8, Serial, CMOS, PDIP8, LEAD AND HALOGEN FREE, PLASTIC, DIP-8

CAT24C21LI-REVB 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:DIP包装说明:DIP,
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.37最大时钟频率 (fCLK):0.4 MHz
JESD-30 代码:R-PDIP-T8JESD-609代码:e3
长度:9.59 mm内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:128 words字数代码:128
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:128X8
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:4.57 mm
串行总线类型:I2C最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.62 mm最长写入周期时间 (tWC):5 ms
Base Number Matches:1

CAT24C21LI-REVB 数据手册

 浏览型号CAT24C21LI-REVB的Datasheet PDF文件第2页浏览型号CAT24C21LI-REVB的Datasheet PDF文件第3页浏览型号CAT24C21LI-REVB的Datasheet PDF文件第4页浏览型号CAT24C21LI-REVB的Datasheet PDF文件第5页浏览型号CAT24C21LI-REVB的Datasheet PDF文件第6页浏览型号CAT24C21LI-REVB的Datasheet PDF文件第7页 
E
CAT24C21  
1-kb Dual Mode Serial EEPROM for VESA"Plug-and-Play"  
TM  
FEATURES  
DDC1TM/DDC2TM interface compliant for  
Low power CMOS technology  
monitor identification  
1,000,000 program/erase cycles  
100 year data retention  
400 kHz I2C bus compatible*  
2.5 to 5.5 volt operation  
16-byte page write buffer  
Hardware write protect  
8-pin DIP, SOIC, TSSOP, MSOP or TDFN  
packages  
Industrial temperature range  
DESCRIPTION  
by the SCL clock input, with both modes sharing a  
commonSDAinput/output(I/O).Thetransmit-onlymode  
is a read-only mode, while the bi-directional mode is a  
read and write mode following the I2C protocol. In write  
mode the CAT24C21 features a 16-byte page write  
buffer.Thedeviceisavailablein8-inDIP,SOIC,TSSOP,  
MSOP and TDFN packages.  
The CAT24C21 is a 1-kb Serial CMOS EEPROM  
internally organized as 128 words of 8 bits each. The  
device complies with the Video Electronics Standard  
Association's(VESA™),DisplayDataChannel(DDC™)  
standards for "Plug-and-Play" monitors. The "transmit-  
only" mode (DDC1™) is controlled by the VCLK clock  
inputandthe"bi-directional"mode(DDC2™)iscontrolled  
PIN CONFIGURATION  
FUNCTIONAL SYMBOL  
DIP Package (P, L)  
SOIC Package (J , W)  
V
CC  
1
2
3
4
8
7
6
5
NC  
NC  
NC  
V
1
2
3
4
8
7
6
5
NC  
NC  
NC  
V
CC  
CC  
VCLK  
SCL  
VCLK  
SCL  
SCL  
V
SDA  
V
SDA  
SS  
SS  
CAT24C21  
SDA  
MSOP Package (R, Z)  
TDFN Package (RD4, ZD4)  
VCLK  
1
2
3
4
8
7
6
5
NC  
NC  
NC  
V
CC  
VCLK  
1
2
3
4
NC  
NC  
NC  
8
7
6
5
V
CC  
VCLK  
SCL  
SCL  
V
SS  
V
SDA  
V
SDA  
SS  
SS  
3 mm x 3 mm  
Top View  
PIN FUNCTIONS  
TSSOP Package (U, Y)  
Pin Name  
Function  
1
2
3
4
8
7
6
5
NC  
NC  
NC  
V
NC  
No Connect  
CC  
VCLK  
SCL  
SDA  
SCL  
VCLK  
VCC  
VSS  
Serial Data/Address  
V
SS  
SDA  
Serial Clock (bi-directional mode)  
Serial Clock (transmit-only mode)  
Power Supply  
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus  
Protocol.  
Ground  
© 2004 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1032, Rev. O  
1

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