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CAT24C208WI-GT3 PDF预览

CAT24C208WI-GT3

更新时间: 2024-11-26 06:46:11
品牌 Logo 应用领域
安森美 - ONSEMI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
10页 125K
描述
8 kb Dual Port Serial EEPROM

CAT24C208WI-GT3 数据手册

 浏览型号CAT24C208WI-GT3的Datasheet PDF文件第2页浏览型号CAT24C208WI-GT3的Datasheet PDF文件第3页浏览型号CAT24C208WI-GT3的Datasheet PDF文件第4页浏览型号CAT24C208WI-GT3的Datasheet PDF文件第5页浏览型号CAT24C208WI-GT3的Datasheet PDF文件第6页浏览型号CAT24C208WI-GT3的Datasheet PDF文件第7页 
CAT24C208  
8 kb Dual Port Serial  
EEPROM  
Description  
The CAT24C208 is an 8 kb Dual Port Serial CMOS EEPROM  
internally organized as 4 segments of 256 bytes each. The  
CAT24C208 features a 16byte page write buffer and can be accessed  
http://onsemi.com  
2
from either of two separate I C compatible ports, DSP (SDA, SCL)  
and DDC (SDA, SCL).  
Arbitration between the two interface ports is automatic and allows  
the appearance of individual access to the memory from each  
interface.  
SOIC8  
W SUFFIX  
CASE 751BD  
Features  
2
Supports Standard and Fast I C Protocol  
PIN CONFIGURATION  
2.5 V to 5.5 V Operation  
16Byte Page Write Buffer  
1
DSP V  
DDC V  
CC  
CC  
2
DSP SCL  
DSP SDA  
EDID SEL  
DDC SCL  
DDC SDA  
Schmitt Triggers and Noise Protection Filters on I C Bus Input  
Low Power CMOS Technology  
1,000,000 Program/Erase Cycles  
100 Year Data Retention  
V
SS  
SOIC (W)  
(Top View)  
Industrial Temperature Range  
SOIC 8lead Package  
This Device is PbFree, Halogen Free/BFR Free, and RoHS  
Compliant  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
DSP V  
DDC V  
CC  
CC  
ARBITRATION  
LOGIC  
D
E
D
E
C
C
1K X 8  
MEMORY  
ARRAY  
DISPLAY  
CONTROL  
LOGIC  
O
D
E
R
S
O
D
E
R
S
DDC  
CONTROL  
LOGIC  
DSP SCL  
DSP SDA  
DDC SCL  
DDC SDA  
CONFIGURATION  
REGISTER  
EDID SEL  
V
SS  
Figure 1. Block Diagram  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
September, 2009 Rev. 6  
CAT24C208/D  

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